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/clk/cpuGclock1lpass_audio_cc_bus_clkGclock2lpass_aon_cc_aon_h_clkGclock36lpass_aon_cc_lpi_noc_ls_clkGclock47lpass_aon_cc_lpi_noc_hs_clkGclock5 lpass_audio_cc_slimbus_core_clkGclock6lpass_aon_mx_cc_va_mem0_clkGclock7lpass_aon_mx_cc_va_mem1_clkGclock9C(lpass_aon_cc_lpass_0_lpmla_ahb_odsc_clkGclock10D(lpass_aon_cc_lpass_1_lpmla_ahb_odsc_clkGclock11?scc_ccd_ahb2ahb_m_clkGclock12@scc_ccd_ahb2ahb_s_clkGclock13Ascc_ahb2ahb_s_clkGclock14Blpass_aon_mx_cc_ibi_clkGclock15\lpass_audio_cc_slimbus_clkGclock16r!lpass_lpmla_cc_lpass_0_lpmla_clkGclock17s!lpass_lpmla_cc_lpass_1_lpmla_clkGclock18x lpass_aon_cc_enpu_scheduler_clkGclock19nlpass_aon_cc_sdc_proc_fclk_clkGclock20q scc_ccd_clkGclock21p scc_smem_clkGclock22Slpass_aon_cc_aud_dma_mem_clkGclock23Tlpass_aon_cc_aud_dma_niu_clkGclock24| scc_psc_clkGbusport-arraybusPort0 busPort1@ busPort2A@ busPort3B@ busPort4D@ busPort5E@ busPort6 busPort7@ busPort8  busPort9S busPort10@1 busPort11@1 busPort12 busPort13 busPort14 $busPort15$ $busPort16% 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/soc/soc/ipcc/ipcc@1103000/soc/ipcc/ipcc@11c1000*/soc/ipcc/ipcc@1281000:/soc/ipcc/ipcc@1341000F/soc/ipcc/ipcc@1401000Q/soc/ipcc_legacy@7088004]/soc/timetick/timer@70a2000i/soc/timetick/timer@70a3000u/soc/pinctrl@f100000*z/soc/pinctrl@f100000/ibi_i3c_qup1_se4_scl*/soc/pinctrl@f100000/ibi_i3c_qup1_se4_sda*/soc/pinctrl@f100000/ibi_i3c_qup1_se7_scl*/soc/pinctrl@f100000/ibi_i3c_qup1_se7_sda*/soc/pinctrl@f100000/ibi_i3c_qup2_se0_scl*/soc/pinctrl@f100000/ibi_i3c_qup2_se0_sda*/soc/pinctrl@f100000/ibi_i3c_qup2_se1_scl* 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/soc/pinctrl@f100000/qup1_se0_l2!/soc/pinctrl@f100000/qup1_se0_l3!$/soc/pinctrl@f100000/qup1_se1_l0!0/soc/pinctrl@f100000/qup1_se1_l1!/soc/pinctrl@7DC0000/ssc_gpio_13_clk%4N/soc/pinctrl@7DC0000/ssc_gpio_14_clk%4^/soc/pinctrl@7DC0000/ssc_gpio_15_clk%4n/soc/pinctrl@7DC0000/ssc_gpio_18_clk%4~/soc/pinctrl@7DC0000/ssc_gpio_19_clk%4/soc/pinctrl@7DC0000/ssc_gpio_26_clk%4/soc/pinctrl@7DC0000/ssc_gpio_27_clk%4/soc/pinctrl@7DC0000/ssc_gpio_30_clk%4/soc/pinctrl@7DC0000/ssc_gpio_31_clk%4/soc/pinctrl@7DC0000/ssc_gpio_32_clk%4/soc/pinctrl@7DC0000/ssc_gpio_33_clk%4/soc/pinctrl@7DC0000/ssc_gpio_34_clk%4/soc/pinctrl@7DC0000/ssc_gpio_35_clk%5/soc/pinctrl@7DC0000/ssc_gpio_38_clk%5/soc/pinctrl@7DC0000/ssc_gpio_39_clk$5./soc/pinctrl@7DC0000/ssc_gpio_6_clk$5=/soc/pinctrl@7DC0000/ssc_gpio_7_clk%5L/soc/pinctrl@7DC0000/ssc_qup0_se0_l0%5\/soc/pinctrl@7DC0000/ssc_qup0_se0_l1%5l/soc/pinctrl@7DC0000/ssc_qup0_se1_l0%5|/soc/pinctrl@7DC0000/ssc_qup0_se1_l1%5/soc/pinctrl@7DC0000/ssc_qup0_se2_l0%5/soc/pinctrl@7DC0000/ssc_qup0_se2_l1%5/soc/pinctrl@7DC0000/ssc_qup0_se2_l2%5/soc/pinctrl@7DC0000/ssc_qup0_se2_l3%5/soc/pinctrl@7DC0000/ssc_qup0_se2_l4%5/soc/pinctrl@7DC0000/ssc_qup0_se2_l5%5/soc/pinctrl@7DC0000/ssc_qup0_se3_l0%5/soc/pinctrl@7DC0000/ssc_qup0_se3_l1%6 /soc/pinctrl@7DC0000/ssc_qup0_se4_l0%6/soc/pinctrl@7DC0000/ssc_qup0_se4_l1%6,/soc/pinctrl@7DC0000/ssc_qup0_se4_l2%6/soc/pinctrl@7DC0000/qup_ssc1_se0_i3c_sleep1>/soc/pinctrl@7DC0000/qup_ssc1_se0_i3c_ibi_active0>;/soc/pinctrl@7DC0000/qup_ssc1_se0_i3c_ibi_sleep->V/soc/pinctrl@7DC0000/qup_ssc1_se1_i2c_active,>n/soc/pinctrl@7DC0000/qup_ssc1_se1_i2c_sleep->/soc/pinctrl@7DC0000/qup_ssc1_se1_i3c_active,>/soc/pinctrl@7DC0000/qup_ssc1_se1_i3c_sleep1>/soc/pinctrl@7DC0000/qup_ssc1_se1_i3c_ibi_active0>/soc/pinctrl@7DC0000/qup_ssc1_se1_i3c_ibi_sleep->/soc/pinctrl@7DC0000/qup_ssc1_se2_i2c_active,?/soc/pinctrl@7DC0000/qup_ssc1_se2_i2c_sleep-?/soc/pinctrl@7DC0000/qup_ssc1_se2_i3c_active,?2/soc/pinctrl@7DC0000/qup_ssc1_se2_i3c_sleep1?I/soc/pinctrl@7DC0000/qup_ssc1_se2_i3c_ibi_active0?e/soc/pinctrl@7DC0000/qup_ssc1_se2_i3c_ibi_sleep-?/soc/pinctrl@7DC0000/qup_ssc1_se2_spi_active,?/soc/pinctrl@7DC0000/qup_ssc1_se2_spi_sleep0?/soc/pinctrl@7DC0000/qup_ssc1_se2_spi_3w_active/?/soc/pinctrl@7DC0000/qup_ssc1_se2_spi_3w_sleep-?/soc/pinctrl@7DC0000/qup_ssc1_se3_i2c_active,?/soc/pinctrl@7DC0000/qup_ssc1_se3_i2c_sleep-@/soc/pinctrl@7DC0000/qup_ssc1_se3_i3c_active,@+/soc/pinctrl@7DC0000/qup_ssc1_se3_i3c_sleep1@B/soc/pinctrl@7DC0000/qup_ssc1_se3_i3c_ibi_active0@^/soc/pinctrl@7DC0000/qup_ssc1_se3_i3c_ibi_sleep-@y/soc/pinctrl@7DC0000/qup_ssc1_se4_i2c_active,@/soc/pinctrl@7DC0000/qup_ssc1_se4_i2c_sleep-@/soc/pinctrl@7DC0000/qup_ssc1_se5_i2c_active,@/soc/pinctrl@7DC0000/qup_ssc1_se5_i2c_sleep-@/soc/pinctrl@7DC0000/qup_ssc1_se5_spi_active,@/soc/pinctrl@7DC0000/qup_ssc1_se5_spi_sleep0A/soc/pinctrl@7DC0000/qup_ssc1_se5_spi_3w_active/A!/soc/pinctrl@7DC0000/qup_ssc1_se5_spi_3w_sleep-A;/soc/pinctrl@7DC0000/qup_ssc1_se6_i2c_active,AS/soc/pinctrl@7DC0000/qup_ssc1_se6_i2c_sleep-Aj/soc/pinctrl@7DC0000/qup_ssc1_se6_i3c_active,A/soc/pinctrl@7DC0000/qup_ssc1_se6_i3c_sleep1A/soc/pinctrl@7DC0000/qup_ssc1_se6_i3c_ibi_active0A/soc/pinctrl@7DC0000/qup_ssc1_se6_i3c_ibi_sleep.A/soc/pinctrl@7DC0000/qup_ssc1_se6_uart_active-A/soc/pinctrl@7DC0000/qup_ssc1_se6_uart_sleep-B/soc/pinctrl@7DC0000/qup_ssc1_se7_i2c_active,B/soc/pinctrl@7DC0000/qup_ssc1_se7_i2c_sleep B0/soc/vdd_mxa B8/soc/vdd_mxc B@/soc/vdd_cxBG/soc/vdd_lpi_mxBR/soc/vdd_lpi_cxB]/soc/systemcache@31800000Bj/soc/clock-controller@100000Bn/soc/clock-controller@7000000Bz/soc/clock-controller@3a20000B/soc/clock-controller@7f00000B/soc/clock-controller@73c0000B/soc/clock-controller@7540000B/soc/clock-controller@8400000B/soc/cesta@7a13000B/soc/spmi-bus@c400000B/soc/spmi-bus@c400000/pmic@06B/soc/spmi-bus@c400000/pmic@0/spmi-vadc@92/therm_tableB/soc/spmi-bus@c4360009B/soc/kernel_test_devices@0/interrupt-controller@10140000B/soc/ibi_top_0_cfg@EC90000C/soc/ibi_top_1_cfg@ECA0000C/soc/ibi_top_2_cfg@ECB0000C/soc/ibi_top_3_cfg@ECC0000C+/soc/ibi_top_4_cfg@ECD0000C9/soc/ibi_top_5_cfg@ECE0000CG/soc/ibi_top_6_cfg@ECF0000CU/soc/ibi_top_7_cfg@ED00000Cc/soc/ibi_top_8_cfg@ED10000Cq/soc/ibi_top_9_cfg@ED20000C/soc/ibi_top_10_cfg@ED30000C/soc/ssc_ibi_cd_domainsC/soc/ibi_ssc_0_cfg@7D00000C/soc/ibi_ssc_1_cfg@7D10000C/soc/ibi_ssc_2_cfg@7D20000C/soc/ibi_ssc_3_cfg@7D30000C/soc/ibi_ssc_4_cfg@7D40000C/soc/ibi_ssc_5_cfg@7D50000C/soc/ibi_ssc_6_cfg@7D60000D/soc/ibi_ssc_7_cfg@7D70000D/soc/ibi_ssc_8_cfg@7D80000D/soc/ibi_ssc_9_cfg@7D90000D-/soc/qdss/tpath_stmD7/soc/funnel@10041000DS/soc/funnel@11304000 /soc/tnoc@11331000 e/soc/tnoc@11344000Da/soc/tpda@1135D000D|/soc/tpda@11359000D/sw'D/sw/prm/prm_rsrcs/prm-regulator-b1b-e0'D/sw/prm/prm_rsrcs/prm-regulator-l1b-e0'D/sw/prm/prm_rsrcs/prm-regulator-l2b-e0(D/sw/prm/prm_rsrcs/prm-regulator-l18b-e0'D/sw/prm/prm_rsrcs/prm-regulator-l3d-e0'D/sw/prm/prm_rsrcs/prm-regulator-l4d-e0'D/sw/prm/prm_rsrcs/prm-regulator-l1i-e0'D/sw/prm/prm_rsrcs/prm-regulator-l5n-e1(D/sw/prm/prm_rsrcs/prm-regulator-ls1b-e0(D/sw/prm/prm_rsrcs/prm-regulator-ls2b-e0(D/sw/prm/prm_rsrcs/prm-regulator-ls3b-e0(D/sw/prm/prm_rsrcs/prm-regulator-ls4b-e0D/sw/prm/prm-pamD/sw/prm/prm-pam/pcie0 modelcompatible#address-cells#size-cellsproc-namechip-infophandlesupported-hostshostremote-hostfifo-sizemtu-sizeirq-outqos-max-ratechannel-namemailbox-area-size-bytesmaster-mailbox-size-bytesmax-tx-pending-itemsis-mastermailbox-desc-starthost-nameidtransportremote-ssch-nameoptionsprioritystack-sizeintentstx-channelrx-channelhost-idfflagsmax-entriesdestprocirqcore-top-csr-strtcsr-basemutex-offsets-datawonce-offsetsregclientprotocol-nameprotocol-idxinterrupt-parentinterrupts#signalsclient-mappingoffsetout-masktimer-nametimer-freqtimer-numtimer-interruptngpioswidthqcom,strongpullegpiogpio-controller#gpio-cellsinterrupt-typesinterrupt-namessummary-targetprocglobal-ctxt-namemuxconfigqcom,slewrateqcom,sleep-configregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-init-microvoltqcom,resource-nameqcom,all-pd-regulatorqcom,lpr-enableqcom,drv-idreg-namesllcc-common-regllcc-lcp-regpartial-cachelpi-shared-reglpi-basescid#clock-cellsuse-interruptsidmidpmicbidtherm-tbllabelhw-chhw-settleavg-spdec-ratiocal-methodscalingscale-fcnpull-upasidarr_idtablehw-common-paramsadctm-hw-paramstrip-rangeinterrupt-controller#interrupt-cellsmessagenum_ssc_qupibi_baseprotocolse_island_configtre_list_sizeibi_se_indexse_modeload_fwdfs_modeibi_idgpiigpii_irqmgr_irqstatusclock-namesclocksqup_idqup_common_offsetse_wrapper_base_offsetcore_frequencyqup_flagsnum_sesdc_gpii_listcore_offsetibi_instancese_flagsFIFO_MODEprotocol_supportedinterface_supportednum_gpiisring_size_multipliercore_irqpdc_irqparent_wakeup_gpioshared_seod_frequencyi2c_hs_i3c_src_freqis_pipeline_enablelog_levelpinctrl-namespinctrl-0pinctrl-1pinctrl-2pinctrl-3pinctrl-4pinctrl-5pinctrl-6pinctrl-7pinctrl-8pinctrl-9i2c_hubnum_top_qupsirq_numqup0_cfgqup1_cfgqup2_cfgqup3_cfgqup4_cfgqupc_cmn_offsetgpii_ch_offsetgpii_ch_sizebmi_offsetbmi_sizenum_gpii_channelsnum_bmismax_xfer_retriesgpii_ch_irqgsi_paqupc_qup_instance_idgpii_irq_offsetpsc_ic_bit_offsetqupc_sh_mem_offsetqupc_sh_mem_sizevendor_sh_mem_offsetvendor_sh_mem_sizetcsr_addrtcsr_gpii_offsettcsr_irqgpii_interruptsnum_gpiiactivetypebase_portnum_portsatidsync_periodtpdm_nametpdatpda_portdatasetcti_channelscti_triggersdbg_regspwrdbg_ctrl_reglpi_funnellpi_funnel_portport_lpass_lpi_lpass_lpi_trace_nocport_ddrss_lpi_ddrss_lpi_trace_noctpathcti_nametnoc_idtnoc_funnel_nametstypetpda_nameport_occupied_maskrestartcacheableisland_residentnature_typedt_typepd_namespawn_attrpram_namepram_sizept_namewdog_irq_numerr_irq_numcode_ram_addrdata_ram_addrcode_ram_sizedata_ram_sizepram_addrssc_sdc_physpool_addrssc_sdc_physpool_sizeipcmem_physpool_addripcmem_physpool_sizeservice_idimage_idxeic_crash_enableeic_crash_typeeic_crash_delaypd_timeout_exit_msecthreshold_timeout_secnum_pdrs_logpd_binary_local_pathpd_binary_remote_pathpd_mon_install_attrpd_mon_image_sw_idsubdomain_namecallstack_smem_idpd_mon_restart_enablepd_mon_dump_disablercinit_term_err_fatal_enablercinit_term_timeoutrcinit_term_timeout_group_0rcinit_term_timeout_group_1rcinit_term_timeout_group_2rcinit_term_timeout_group_3rcinit_term_timeout_group_4rcinit_term_timeout_group_5rcinit_term_timeout_group_6rcinit_term_timeout_group_7rcinit_term_latency_enableservreg_local_domainservreg_soc_nameservreg_domain_nameservreg_subdomain_nameservreg_qmi_instance_idssctl_srvsys_m_smem_ssr_reswdog_nmi_timewdog_bite_timewdog_bark_timewdog_statuswdog_ctlwdog_bite_nmiwdog_resetwdog_nmi_time_data_bmskwdog_bite_time_data_bmskwdog_bark_time_data_bmskwdog_ctl_wdog_to_nmi_en_bmskwdog_ctl_wdog_to_nmi_en_shftwdog_ctl_enable_bmskwdog_ctl_enable_shftwdog_reset_wdog_reset_shftimage_idclient_nameclient_idamss_heap_caller_levelqdss_service_idllccsscid-mapping-regusecase-iddump-poolsdiag_cmd_request_fdiag_start_stress_test_fdiag_stress_test_loopbackdiag_legacy_health_count_basediag_get_max_req_pkt_lendiag_delay_health_count_basediag_dcm_cmd_reg_test_basediag_ulogdiag_processor_iddiag_subsys_id_basediag_flow_control_count_basediag_dsm_chained_count_basediag_get_cmd_reg_tbldiag_subsys_mask_retrieval_basediag_f3_trace_set_configdiag_tx_mode_configdiag_stress_test_delayed_rspdiag_drop_threshold_configdiag_query_enablediag_get_time_apidiag_get_drop_perdiag_uimage_health_statsdiag_start_stress_test_adv_fdiag_health_stats_basediag_get_set_drain_paramdiag_set_drain_propdiag_health_report_configdiag_get_set_client_settingsdiag_lock_buffer_apidiag_instance_id_basediag_err_ulog_sizediag_debug_ulog_sizediag_cmd_ulog_sizediag_data_ulog_sizediag_qdss_ulog_sizediag_ctrl_ulog_sizediag_listener_ulog_sizediag_sendbuf_dbg_ulog_sizediag_mpd_drain_timer_lendiag_mpd_buf_commit_thresh_perdiag_mpd_buf_drain_thresh_perdiag_event_timer_lendiag_event_rpt_pkt_len_sizediag_event_rpt_pkt_sizediag_drain_timer_lendiag_event_send_maxdiag_event_heap_sizediag_ctrl_send_buf_sizediag_ctrl_read_buf_sizediag_cmd_read_buf_sizediag_event_sec_heap_sizediag_dci_read_buf_sizediag_rsp_heap_sizediag_heap_sizediag_f3_trace_buf_sizediag_buf_sizediag_rsp_alloc_retry_timer_lendiag_mask_notify_timer_lendiag_tx_sleep_threshold_defaultdiag_tx_sleep_time_defaultdiag_core_pd_drain_thresholddiag_sio_timeout_timer_lendiag_cmd_read_tout_timer_lendiag_max_active_listenersdiag_many_drain_per_markdiag_few_drain_per_markdiag_hdlc_pad_lendiag_stress_task_sleep_completediag_buf_commit_thresholddiag_buffer_default_lock_statediag_drop_flow_cnt_incrdiag_drop_per_step_maxdiag_drop_per_threshold_maxdiag_deferrable_timerdiag_deferrable_timer_exdiag_send_data_buf_size_maxdiag_min_send_data_sizediag_msg_fmt_str_arg_sizediag_f3_trace_timediag_ctrl_my_proc_iddiag_my_proc_iddiag_stm_proc_maskdiag_max_send_buf_cntdiag_event_rpt_pkt_len_size_nrtdiag_event_rpt_pkt_size_nrtdiag_event_send_max_nrtdiag_event_timer_len_nrtdiag_tx_sleep_threshold_nrtdiag_tx_sleep_time_nrtdiag_drain_timer_len_nrtdiagbuf_commit_threshold_nrtdiag_mpd_commit_thresh_nrt_perdiag_uimage_drain_timer_lendiag_uimage_buf_high_per_wmdiag_uimage_f3_trace_buf_sizediag_uimage_pooldiag_uimage_test_pooldiag_early_log_controldiag_early_log_maskdiag_early_event_maskdiag_early_message_maskdiag_f3_trace_controldiag_f3_trace_detail_maskdiag_f3_trace_versionqcom,prm-queryqcom,prm-publish-rsrcsqcom,prm-rsrc-aliasqcom,prm-vregqcom,prm-controlqcom,prm-typeqcom,pm-indexqcom,pm-sidqcom,pm-bidqcom,prm-clockpam-namepam-mode-countpam-supplypam-modesTHREAD_NUMBEROVERHANG_VOTE_TIMEOUT_MSDEBUG_LEVELbaseAddrphysAddrcoreIdpwrDomaincoreClockInstancesmasterBusPortInstancesslaveBusPortInstancesnumInstancesmemIdclkIdclkTypeclkCntlTypeclkNameclkSrcIdmemoryIdportConnectionbusClkregProgClocksicbarbMasteraccessPorticbarbSlavemasterPortslavePortpwrDomainNamepwrDomainTypeintrReinitTriggerintrReinitDonesecurityClocksclientNumrouteshw_instancemasterIcbPortslaveIcbPortminindex0index1index2index3index4index5index6index7index8index9index10socipcc_mprocipcc_compute_l0ipcc_compute_l1ipcc_periphipcc_fenceipcc_legacySystemTimerWakeUpTimertlmmibi_i3c_qup1_se4_sclibi_i3c_qup1_se4_sdaibi_i3c_qup1_se7_sclibi_i3c_qup1_se7_sdaibi_i3c_qup2_se0_sclibi_i3c_qup2_se0_sdaibi_i3c_qup2_se1_sclibi_i3c_qup2_se1_sdaibi_i3c_qup3_se1_sclibi_i3c_qup3_se1_sdaibi_i3c_qup3_se2_sclibi_i3c_qup3_se2_sdaibi_i3c_qup4_se0_sclibi_i3c_qup4_se0_sdaibi_i3c_qup4_se1_sclibi_i3c_qup4_se1_sdaibi_i3c_qup4_se2_sclibi_i3c_qup4_se2_sdaqup1_se0_l0qup1_se0_l1qup1_se0_l2qup1_se0_l3qup1_se1_l0qup1_se1_l1qup1_se1_l2qup1_se1_l3qup1_se2_l0qup1_se2_l1qup1_se2_l2qup1_se2_l3qup1_se2_l4qup1_se2_l5qup1_se2_l6qup1_se3_l0qup1_se3_l1qup1_se3_l2qup1_se3_l3qup1_se4_l0qup1_se4_l1qup1_se4_l2qup1_se4_l3qup1_se5_l0qup1_se5_l1qup1_se5_l2qup1_se5_l3qup1_se6_l0qup1_se6_l1qup1_se6_l2qup1_se6_l3qup1_se7_l0qup1_se7_l1qup1_se7_l2qup1_se7_l3qup2_se0_l0qup2_se0_l1qup2_se0_l2qup2_se0_l3qup2_se1_l0qup2_se1_l1qup2_se1_l2qup2_se1_l3qup2_se2_l0qup2_se2_l1qup2_se2_l2qup2_se2_l3qup2_se3_l0qup2_se3_l1qup2_se3_l2qup2_se3_l3_miraqup2_se3_l3_mirbqup2_se4_l0qup2_se4_l1qup2_se4_l2qup2_se4_l3qup3_se0_l0qup3_se0_l1qup3_se0_l2qup3_se0_l3qup3_se1_l0qup3_se1_l1qup3_se1_l2qup3_se1_l3qup3_se1_l4qup3_se1_l5qup3_se1_l6qup3_se2_l0qup3_se2_l1qup3_se2_l2qup3_se2_l3qup3_se3_l0qup3_se3_l1qup3_se3_l2qup3_se3_l3qup3_se4_l0qup3_se4_l1qup3_se4_l2qup3_se4_l3qup3_se5_l0qup3_se5_l1qup3_se5_l2qup3_se5_l3qup4_se0_l0qup4_se0_l1qup4_se0_l2qup4_se0_l3qup4_se1_l0qup4_se1_l1qup4_se1_l2qup4_se1_l3qup4_se2_l0qup4_se2_l1qup4_se2_l2qup4_se2_l3qup4_se3_l0qup4_se3_l1qup4_se3_l2qup4_se3_l3_miraqup4_se3_l3_mirbqup4_se4_l0qup4_se4_l1qup4_se4_l2qup4_se4_l3_miraqup4_se4_l3_mirbtop_qup1_se0_i2c_activetop_qup1_se0_i2c_sleeptop_qup1_se0_spi_activetop_qup1_se0_spi_sleeptop_qup1_se0_uart_activetop_qup1_se0_uart_sleeptop_qup1_se1_i2c_activetop_qup1_se1_i2c_sleeptop_qup1_se1_spi_activetop_qup1_se1_spi_sleeptop_qup1_se1_uart_activetop_qup1_se1_uart_sleeptop_qup1_se2_i2c_activetop_qup1_se2_i2c_sleeptop_qup1_se2_spi_activetop_qup1_se2_spi_sleeptop_qup1_se2_uart_activetop_qup1_se2_uart_sleeptop_qup1_se3_i2c_activetop_qup1_se3_i2c_sleeptop_qup1_se3_spi_activetop_qup1_se3_spi_sleeptop_qup1_se3_uart_activetop_qup1_se3_uart_sleeptop_qup1_se4_i2c_activetop_qup1_se4_i2c_sleeptop_qup1_se4_i3c_activetop_qup1_se4_i3c_sleeptop_qup1_se4_i3c_ibi_activetop_qup1_se4_i3c_ibi_sleeptop_qup1_se4_spi_activetop_qup1_se4_spi_sleeptop_qup1_se4_uart_activetop_qup1_se4_uart_sleeptop_qup1_se5_i2c_activetop_qup1_se5_i2c_sleeptop_qup1_se5_spi_activetop_qup1_se5_spi_sleeptop_qup1_se5_uart_activetop_qup1_se5_uart_sleeptop_qup1_se6_i2c_activetop_qup1_se6_i2c_sleeptop_qup1_se6_spi_activetop_qup1_se6_spi_sleeptop_qup1_se6_uart_activetop_qup1_se6_uart_sleeptop_qup1_se7_i2c_activetop_qup1_se7_i2c_sleeptop_qup1_se7_i3c_activetop_qup1_se7_i3c_sleeptop_qup1_se7_i3c_ibi_activetop_qup1_se7_i3c_ibi_sleeptop_qup1_se7_spi_activetop_qup1_se7_spi_sleeptop_qup1_se7_uart_activetop_qup1_se7_uart_sleeptop_qup2_se0_i2c_activetop_qup2_se0_i2c_sleeptop_qup2_se0_i3c_activetop_qup2_se0_i3c_sleeptop_qup2_se0_i3c_ibi_activetop_qup2_se0_i3c_ibi_sleeptop_qup2_se0_spi_activetop_qup2_se0_spi_sleeptop_qup2_se0_uart_activetop_qup2_se0_uart_sleeptop_qup2_se1_i2c_activetop_qup2_se1_i2c_sleeptop_qup2_se1_i3c_activetop_qup2_se1_i3c_sleeptop_qup2_se1_i3c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88d(, qcom,hawi qcom,hawi board-id,audio_process-hawi-1.0-adsp6soc @cxstmtrace@16000000qcom,stmtraceHLV@lpistmtrace@7900000qcom,stmtraceHLV@sw@coremprocqmiqcsiqcom,qmi_qcsi_user_pd_configqmi_qcsi_ping_server_config`k!debugtoolstms_diagqcom,tms_diagweic qcom,eicZversion_tblqcom,image_version_tbl_idxpowerqdsp_pmpdqcom,pd-audio-processdebugtraceqcom,debugtrace servicestunamemheap qcom,memheapdiagqcom,audio_user_diagcfgdiagcfg_cmdgi=6Qe diagcfg_param 4Ph2|1K^n AUDIO_ISLAND_TCM_PHYSPOOLQSH_ISLAND_POOL__symbols__/soc/sw modelcompatible#address-cells#size-cellsproc-namechip-infophandleregbase_portnum_portsservice_idinstance_idimage_ideic_crash_enableeic_crash_typeeic_crash_delayimage_idxQDI_QDSP_PM_USER_IDqdss_service_idamss_heap_caller_leveldiag_test_cmd_fdiag_v2_test_cmd_fdiag_legacy_health_count_basediag_ulogdiag_processor_iddiag_subsys_id_basediag_lsm_cmd_reg_test_basediag_get_set_drain_paramdiag_f3_trace_set_configdiag_health_stats_basediag_err_ulog_sizediag_debug_ulog_sizediag_qdss_ulog_sizediag_logtracker_ulog_sizediag_event_timer_lendiag_event_rpt_pkt_len_sizediag_event_rpt_pkt_sizediag_event_send_maxdiag_multipd_buf_sizediag_multipd_event_heap_sizediag_send_buf_size_data_userpddiag_lsm_stack_sizediag_stress_task_sleep_completediag_deferrable_timerdiag_deferrable_timer_exdiag_msg_fmt_str_arg_sizediag_task_prioritydiag_my_proc_iddiag_uimage_mpd_buf_sizediag_uimage_f3_trace_buf_sizediag_uimage_pooldiag_uimage_test_poolsocsw p8( qcom,hawi qcom,hawi board-id,qsh_process-hawi-1.0-adsp6soc @cxstmtrace@16000000qcom,stmtraceHL@V@lpistmtrace@7900000qcom,stmtraceHL@V@sw@coremprocqmiqcsiqcom,qmi_qcsi_user_pd_configqmi_qcsi_ping_server_config`k"productssdcloaderqcom,sdcloadersdc_paramsw<bsdc_physpoolpPdebugtoolstms_diagqcom,tms_diag(eic qcom,eic1BQZversion_tblqcom,image_version_tbl_idxapowerqdsp_pmpdqcom,pd-qsh-processkdebugtraceqcom,debugtrace servicestunamemheap qcom,memheapdiagqcom,sensor_user_diagcfgdiagcfg_cmdhj=1J c'diagcfg_paramz 2-C`8 VQSH_ISLAND_POOLgQSH_ISLAND_POOLqup_user_pd_featureqcom,sw-qup-user-pd-controller}__symbols__/soc/sw modelcompatible#address-cells#size-cellsproc-namechip-infophandleregbase_portnum_portsservice_idinstance_idwdog_irq_numerr_irq_numcode_ram_addrdata_ram_addrcode_ram_sizedata_ram_sizepram_addrssc_sdc_physpool_addrssc_sdc_physpool_sizeipcmem_physpool_addripcmem_physpool_sizeimage_ideic_crash_enableeic_crash_typeeic_crash_delayimage_idxQDI_QDSP_PM_USER_IDqdss_service_idamss_heap_caller_leveldiag_test_cmd_fdiag_v2_test_cmd_fdiag_legacy_health_count_basediag_ulogdiag_processor_iddiag_subsys_id_basediag_lsm_cmd_reg_test_basediag_get_set_drain_paramdiag_f3_trace_set_configdiag_health_stats_basediag_err_ulog_sizediag_debug_ulog_sizediag_qdss_ulog_sizediag_logtracker_ulog_sizediag_event_timer_lendiag_event_rpt_pkt_len_sizediag_event_rpt_pkt_sizediag_event_send_maxdiag_multipd_buf_sizediag_multipd_event_heap_sizediag_send_buf_size_data_userpddiag_lsm_stack_sizediag_stress_task_sleep_completediag_deferrable_timerdiag_deferrable_timer_exdiag_msg_fmt_str_arg_sizediag_task_prioritydiag_my_proc_iddiag_uimage_mpd_buf_sizediag_uimage_f3_trace_buf_sizediag_uimage_pooldiag_uimage_test_pooluser_pd_island_enabledsocsw 8(( qcom,hawi qcom,hawi board-id,ois_process-hawi-1.0-adsp6soc @SFE_PSC_SHARED_MEMORY@8600000H`  qcom,psc-sfeL_pcxstmtrace@16000000qcom,stmtraceH@sw@coremprocqmiqcsiqcom,qmi_qcsi_user_pd_configqmi_qcsi_ping_server_config$debugtoolstms_diagqcom,tms_diagPeic qcom,eicZversion_tblqcom,image_version_tbl_idxpowerqdsp_pmpdqcom,pd-ois-processdebugtraceqcom,debugtraceservicestunamemheap qcom,memheap*diagqcom,ois_user_diagcfgdiagcfg_cmdA{Q|d= diagcfg_param( =Qk2.Nd}__symbols__/soc/sw modelcompatible#address-cells#size-cellsproc-namechip-infophandleregqupc_sh_mem_offsetqupc_sh_mem_sizevendor_sh_mem_offsetvendor_sh_mem_sizebase_portnum_portsservice_idinstance_idimage_ideic_crash_enableeic_crash_typeeic_crash_delayimage_idxQDI_QDSP_PM_USER_IDqdss_service_idamss_heap_caller_leveldiag_test_cmd_fdiag_v2_test_cmd_fdiag_legacy_health_count_basediag_ulogdiag_processor_iddiag_subsys_id_basediag_lsm_cmd_reg_test_basediag_get_set_drain_paramdiag_f3_trace_set_configdiag_health_stats_basediag_err_ulog_sizediag_debug_ulog_sizediag_qdss_ulog_sizediag_logtracker_ulog_sizediag_event_timer_lendiag_event_rpt_pkt_len_sizediag_event_rpt_pkt_sizediag_event_send_maxdiag_multipd_buf_sizediag_multipd_event_heap_sizediag_send_buf_size_data_userpddiag_lsm_stack_sizediag_stress_task_sleep_completediag_deferrable_timerdiag_deferrable_timer_exdiag_msg_fmt_str_arg_sizediag_task_prioritydiag_my_proc_idsocswh S#VUSe _t Q(LNvfnxe2Z;a"f&.iVUەF[#Nbrpc жّndSV-)iyT?0>SA wW>0e1*1-T)4_ v\ӓcKxr6;D9[0bs\Z:zj$ƲĔ|/1rh=xZ00:0 *H=01 0 UUS1,0*U#SECTOOLS SECP384R1 CURVE TEST ROOT010U San Diego10U QUALCOMM10U CDMA Technologies1200U )General Use Test Key 0 (for testing only)0 260713161512Z 460708161512Z0f1 0 UUS10U California10USecTools Test User10U SecTools10U San Diego0v0*H=+"bц}P/@:5j}qb0UwDM2@tXϙL0U00 U0 *H=i0f1‚_H9<} ͣb:v࣮^6+<[61ftWzcvž$ֱ(9 @n)f>F߲400N0 *H=01 0 UUS1+0)U"SECTOOLS SECP384R1 CURVE TEST ROOT10U San Diego10U QUALCOMM10U CDMA Technologies100.U 'General Use Test Key (for testing only)0 160321215211Z 360316215211Z01 0 UUS1+0)U"SECTOOLS SECP384R1 CURVE TEST ROOT10U San Diego10U QUALCOMM10U CDMA Technologies100.U 'General Use Test Key (for testing only)0v0*H=+"b3x~ ҩ/פ{Pyjh`7_줎j^K1o$lTg ]ء[SQq6 /PZoT:ާ%i1>}`<0:0Uoq' s ֟>qb0 U00 U0 *H=h0e0u(C9uT(&\LGaT׍),$Wusr/lib/firmware/qcom/kaanapali/adsp_dtb.mbn000064400000547470152531543030015117 0ustar00ELF((44 ((88 H8E((EDqcom,kaanapaliqcom,kaanapali board-id#,default_process-kaanapali-1.0-adsp6soc @glink qcom,glinkPHproc-infoXxport-smem-configedge-01]i@s |N edge-02]i@s |N edge-03]is |9N edge-04]i@s |N xport-qmp-configedge-01 aop_adsp] |ipc_routerqcom,ipc_routerproc-infoadsp devcfg-glink-xalsedge-01SMEMapss#IPCRTR+3< G edge-02SMEMmpss#IPCRTR+3< G edge-03SMEMcdsp#IPCRTR+3< G devcfg-mhi-xalsedge-01MHIwpssO2Z3smp2p qcom,smp2pproc-infoemtsmp2p-interruptsintr-01intr-02smem qcom,smem CORE_TOP_CSR  0 @ @ipcc  qcom,ipccipcc@1103000qcom,ipcc-protocolMPROCy D!"#:;-.9@ipcc@11c1000qcom,ipcc-protocol COMPUTE_L0N D !"# /9 -.@ipcc@1281000qcom,ipcc-protocol COMPUTE_L1 D !"# /9 -.@ipcc@1341000qcom,ipcc-protocolPERIPH ( !"#-@ipcc@1401000qcom,ipcc-protocolFENCE d !"# /9 -.@ipcc_legacy@6888004@ipcc_legacy_sdcqcom,ipcc-legacy$89:;+ @timetick timer@68a2000qcom,timetick  4SystemTimer?$JT@timer@68a3000qcom,timetick0 4WakeUpTimer?$JT@pinctrl@f100000$qcom,kaanapali-pinctrlqcom,pinctrldk q>OVBu}Psummarydirectconn0directconn1directconn2directconn3directconn4directconn5 GPIOINTADSP@ibi_i3c_qup1_se4_scl%@ibi_i3c_qup1_se4_sda$@ibi_i3c_qup1_se7_scl=@#ibi_i3c_qup1_se7_sda<@"ibi_i3c_qup2_se0_scl@)ibi_i3c_qup2_se0_sda@(ibi_i3c_qup2_se1_scl@/ibi_i3c_qup2_se1_sda@.ibi_i3c_qup3_se1_scl @ibi_i3c_qup3_se1_sda@ibi_i3c_qup3_se2_scl @ibi_i3c_qup3_se2_sda @ibi_i3c_qup4_se0_scl1@Yibi_i3c_qup4_se0_sda0@Xibi_i3c_qup4_se1_scl@_ibi_i3c_qup4_se1_sda@^ibi_i3c_qup4_se2_scl!@eibi_i3c_qup4_se2_sda @dqup1_se0_l0P@qup1_se0_l1S@qup1_se0_l2R@qup1_se0_l3Q@qup1_se1_l0J@qup1_se1_l1K@qup1_se1_l2L@qup1_se1_l3M@ qup1_se2_l0(@ qup1_se2_l1)@ qup1_se2_l2*@ qup1_se2_l3+@ qup1_se2_l4@qup1_se2_l5@qup1_se2_l6@qup1_se3_l0,@qup1_se3_l1-@qup1_se3_l2.@qup1_se3_l3/@qup1_se4_l0$@qup1_se4_l1%@qup1_se4_l2&@qup1_se4_l3'@qup1_se5_l04@qup1_se5_l15@qup1_se5_l26@qup1_se5_l37@qup1_se6_l08@qup1_se6_l19@qup1_se6_l2:@qup1_se6_l3;@qup1_se7_l0<@ qup1_se7_l1=@!qup1_se7_l2>@$qup1_se7_l3?@%qup2_se0_l0@&qup2_se0_l1@'qup2_se0_l2@*qup2_se0_l3@+qup2_se1_l0@,qup2_se1_l1@-qup2_se1_l2@0qup2_se1_l3@1qup2_se2_l0u@2qup2_se2_l1v@3qup2_se2_l2w@4qup2_se2_l3x@5qup2_se3_l0z@6qup2_se3_l1{@7qup2_se3_l2|@8qup2_se3_l3}@9qup2_se4_l0@:qup2_se4_l1@;qup2_se4_l2@<qup2_se4_l3@=qup3_se0_l0@@>qup3_se0_l1A@?qup3_se0_l2@@@qup3_se0_l3A@Aqup3_se1_l0@Bqup3_se1_l1 @Cqup3_se1_l2 @Dqup3_se1_l3 @Equp3_se1_l4 @qup3_se1_l5@qup3_se1_l6 @qup3_se2_l0 @Fqup3_se2_l1 @Gqup3_se2_l2@Hqup3_se2_l3@Iqup3_se3_l0@Jqup3_se3_l1@Kqup3_se3_l2@Lqup3_se3_l3@Mqup3_se4_l0@Nqup3_se4_l1@Oqup3_se4_l2@Pqup3_se4_l3@Qqup3_se4_l6@qup3_se5_l0@Rqup3_se5_l1@Squp3_se5_l2@Tqup3_se5_l3@Uqup4_se0_l00@Vqup4_se0_l11@Wqup4_se0_l22@Zqup4_se0_l33@[qup4_se1_l0@\qup4_se1_l1@]qup4_se1_l2@`qup4_se1_l3@aqup4_se2_l0 @bqup4_se2_l1!@cqup4_se2_l2"@fqup4_se2_l3#@gqup4_se3_l0y@hqup4_se3_l1T@iqup4_se3_l2y@jqup4_se3_l3T@kqup4_se4_l0@lqup4_se4_l1@mqup4_se4_l2@nqup4_se4_l3@otop_qup1_se0_i2c_active  @ top_qup1_se0_i2c_sleep@ top_qup1_se0_spi_active XXXX@top_qup1_se0_spi_sleep !!!!@top_qup1_se0_uart_active @top_qup1_se0_uart_sleep @top_qup1_se1_i2c_active  @top_qup1_se1_i2c_sleep@top_qup1_se1_spi_active XXX X@top_qup1_se1_spi_sleep !!! !@top_qup1_se1_uart_active  @top_qup1_se1_uart_sleep  @top_qup1_se2_i2c_active   @top_qup1_se2_i2c_sleep  @top_qup1_se2_spi_active  X X X X@top_qup1_se2_spi_sleep  ! ! ! !@top_qup1_se2_uart_active     @top_qup1_se2_uart_sleep     @top_qup1_se3_i2c_active  @top_qup1_se3_i2c_sleep@top_qup1_se3_spi_active XXXX@ top_qup1_se3_spi_sleep !!!!@!top_qup1_se3_uart_active @"top_qup1_se3_uart_sleep @#top_qup1_se4_i2c_active  @$top_qup1_se4_i2c_sleep@%top_qup1_se4_i3c_active  @&top_qup1_se4_i3c_sleep!!@'top_qup1_se4_i3c_ibi_active  @(top_qup1_se4_i3c_ibi_sleep!!@)top_qup1_se4_spi_active XXXX@*top_qup1_se4_spi_sleep !!!!@+top_qup1_se4_uart_active @,top_qup1_se4_uart_sleep @-top_qup1_se5_i2c_active  @.top_qup1_se5_i2c_sleep@/top_qup1_se5_spi_active XXXX@0top_qup1_se5_spi_sleep !!!!@1top_qup1_se5_uart_active @2top_qup1_se5_uart_sleep @3top_qup1_se6_i2c_active  @4top_qup1_se6_i2c_sleep@5top_qup1_se6_spi_active XXXX@6top_qup1_se6_spi_sleep !!!!@7top_qup1_se6_uart_active @8top_qup1_se6_uart_sleep @9top_qup1_se7_i2c_active  ! @:top_qup1_se7_i2c_sleep !@;top_qup1_se7_i3c_active ! @<top_qup1_se7_i3c_sleep !!!@=top_qup1_se7_i3c_ibi_active" # @>top_qup1_se7_i3c_ibi_sleep"!#!@?top_qup1_se7_spi_active  X!X$X%X@@top_qup1_se7_spi_sleep  !!!$!%!@Atop_qup1_se7_uart_active  !$%@Btop_qup1_se7_uart_sleep  !$%@Ctop_qup2_se0_i2c_active& ' @Dtop_qup2_se0_i2c_sleep&'@Etop_qup2_se0_i3c_active& ' @Ftop_qup2_se0_i3c_sleep&!'!@Gtop_qup2_se0_i3c_ibi_active( ) @Htop_qup2_se0_i3c_ibi_sleep(!)!@Itop_qup2_se0_spi_active &X'X*X+X@Jtop_qup2_se0_spi_sleep &!'!*!+!@Ktop_qup2_se0_uart_active &'*+@Ltop_qup2_se0_uart_sleep &'*+@Mtop_qup2_se1_i2c_active, - @Ntop_qup2_se1_i2c_sleep,-@Otop_qup2_se1_i3c_active, - @Ptop_qup2_se1_i3c_sleep,!-!@Qtop_qup2_se1_i3c_ibi_active. / @Rtop_qup2_se1_i3c_ibi_sleep.!/!@Stop_qup2_se1_spi_active ,X-X0X1X@Ttop_qup2_se1_spi_sleep ,!-!0!1!@Utop_qup2_se1_uart_active ,-01@Vtop_qup2_se1_uart_sleep ,-01@Wtop_qup2_se2_i2c_active2 3 @Xtop_qup2_se2_i2c_sleep23@Ytop_qup2_se2_spi_active 2X3X4X5X@Ztop_qup2_se2_spi_sleep 2!3!4!5!@[top_qup2_se2_uart_active 2345@\top_qup2_se2_uart_sleep 2345@]top_qup2_se3_i2c_active6 7 @^top_qup2_se3_i2c_sleep67@_top_qup2_se3_spi_active 6X7X8X9X@`top_qup2_se3_spi_sleep 6!7!8!9!@atop_qup2_se3_uart_active 6789@btop_qup2_se3_uart_sleep 6789@ctop_qup2_se4_i2c_active: ; @dtop_qup2_se4_i2c_sleep:;@etop_qup2_se4_spi_active :X;X<X=X@ftop_qup2_se4_spi_sleep :!;!<!=!@gtop_qup2_se4_uart_active :;<=@htop_qup2_se4_uart_sleep :;<=@itop_qup3_se0_i2c_active> ? @jtop_qup3_se0_i2c_sleep>?@ktop_qup3_se0_spi_active >X?X@XAX@ltop_qup3_se0_spi_sleep >!?!@!A!@mtop_qup3_se0_uart_active >?@A@ntop_qup3_se0_uart_sleep >?@A@otop_qup3_se1_i2c_activeB C @ptop_qup3_se1_i2c_sleepBC@qtop_qup3_se1_spi_active BXCXDXEX@rtop_qup3_se1_spi_sleep B!C!D!E!@stop_qup3_se1_uart_active BCDE@ttop_qup3_se1_uart_sleep BCDE@utop_qup3_se2_i2c_activeF G @vtop_qup3_se2_i2c_sleepFG@wtop_qup3_se2_spi_active FXGXHXIX@xtop_qup3_se2_spi_sleep F!G!H!I!@ytop_qup3_se2_uart_active FGHI@ztop_qup3_se2_uart_sleep FGHI@{top_qup3_se3_i2c_activeJ K @|top_qup3_se3_i2c_sleepJK@}top_qup3_se3_spi_active JXKXLXMX@~top_qup3_se3_spi_sleep J!K!L!M!@top_qup3_se3_uart_active JKLM@top_qup3_se3_uart_sleep JKLM@top_qup3_se4_i2c_activeN O @top_qup3_se4_i2c_sleepNO@top_qup3_se4_spi_active NXOXPXQX@top_qup3_se4_spi_sleep N!O!P!Q!@top_qup3_se4_uart_active NOPQ@top_qup3_se4_uart_sleep NOPQ@top_qup3_se5_i2c_activeR S @top_qup3_se5_i2c_sleepRS@top_qup3_se5_spi_active RXSXTXUX@top_qup3_se5_spi_sleep R!S!T!U!@top_qup3_se5_uart_active RSTU@top_qup3_se5_uart_sleep RSTU@top_qup4_se0_i2c_activeV W @top_qup4_se0_i2c_sleepVW@top_qup4_se0_i3c_activeV W @top_qup4_se0_i3c_sleepV!W!@top_qup4_se0_i3c_ibi_activeX Y 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/soc/pinctrl@f100000/top_qup4_se4_spi_sleep.4$/soc/pinctrl@f100000/top_qup4_se4_uart_active-4=/soc/pinctrl@f100000/top_qup4_se4_uart_sleep4U/soc/pinctrl@7760000!4^/soc/pinctrl@7760000/slimbus_clk"4j/soc/pinctrl@7760000/slimbus_data.4w/soc/pinctrl@7760000/slimbus_default_gpio_cfg4/soc/pinctrl@75C0000%4/soc/pinctrl@75C0000/ssc_gpio_10_clk%4/soc/pinctrl@75C0000/ssc_gpio_11_clk%4/soc/pinctrl@75C0000/ssc_gpio_12_clk%4/soc/pinctrl@75C0000/ssc_gpio_13_clk%4/soc/pinctrl@75C0000/ssc_gpio_14_clk%4/soc/pinctrl@75C0000/ssc_gpio_15_clk%4/soc/pinctrl@75C0000/ssc_gpio_18_clk%5 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/soc/pinctrl@75C0000/qup_ssc1_se5_i2c_sleep-A"/soc/pinctrl@75C0000/qup_ssc1_se5_spi_active,A:/soc/pinctrl@75C0000/qup_ssc1_se5_spi_sleep0AQ/soc/pinctrl@75C0000/qup_ssc1_se5_spi_3w_active/Al/soc/pinctrl@75C0000/qup_ssc1_se5_spi_3w_sleep-A/soc/pinctrl@75C0000/qup_ssc1_se6_i2c_active,A/soc/pinctrl@75C0000/qup_ssc1_se6_i2c_sleep-A/soc/pinctrl@75C0000/qup_ssc1_se6_i3c_active,A/soc/pinctrl@75C0000/qup_ssc1_se6_i3c_sleep1A/soc/pinctrl@75C0000/qup_ssc1_se6_i3c_ibi_active0B/soc/pinctrl@75C0000/qup_ssc1_se6_i3c_ibi_sleep.B/soc/pinctrl@75C0000/qup_ssc1_se6_uart_active-B4/soc/pinctrl@75C0000/qup_ssc1_se6_uart_sleep BL/soc/vdd_mxa BT/soc/vdd_mxc B\/soc/vdd_cxBc/soc/vdd_lpi_mxBn/soc/vdd_lpi_cxBy/soc/clock-controller@100000B}/soc/clock-controller@1f40000B/soc/clock-controller@7700000B/soc/clock-controller@6bc0000B/soc/clock-controller@7b00000B/soc/clock-controller@6e40000B/soc/clock-controller@7880000B/soc/cesta@7213000B/soc/funnel@10041000B/soc/funnel@11353000C/soc/funnel@11304000C /soc/funnel@11344000/soc/tnoc@11331000h/soc/tpda@11352000/soc/tpda@11347000C@/soc/systemcache@31800000CM/soc/ssc_ibi_cd_domainsC`/soc/ibi_ssc_0_cfg@7500000Cn/soc/ibi_ssc_1_cfg@7510000C|/soc/ibi_ssc_2_cfg@7520000C/soc/ibi_ssc_3_cfg@7530000C/soc/ibi_ssc_4_cfg@7540000C/soc/ibi_ssc_5_cfg@7550000C/soc/ibi_ssc_6_cfg@7560000C/soc/ibi_ssc_7_cfg@7570000C/soc/ibi_ssc_8_cfg@7580000C/soc/ibi_ssc_9_cfg@7590000C/soc/ibi_top_0_cfg@EC90000C/soc/ibi_top_1_cfg@ECA0000D/soc/ibi_top_2_cfg@ECB0000D/soc/ibi_top_3_cfg@ECC0000D$/soc/ibi_top_4_cfg@ECD0000D2/soc/ibi_top_5_cfg@ECE0000D@/soc/ibi_top_6_cfg@ECF0000DN/soc/ibi_top_7_cfg@ED00000D\/soc/ibi_top_8_cfg@ED10000Dj/soc/spmi-bus@c400000Ds/soc/spmi-bus@c400000/pmic@06D}/soc/spmi-bus@c400000/pmic@0/spmi-vadc@92/therm_tableD/soc/spmi-bus@c4360009D/soc/kernel_test_devices@0/interrupt-controller@10140000D/sw'D/sw/prm/prm_rsrcs/prm-regulator-b1b-e0'D/sw/prm/prm_rsrcs/prm-regulator-l1b-e0'D/sw/prm/prm_rsrcs/prm-regulator-l2b-e0'D/sw/prm/prm_rsrcs/prm-regulator-l5b-e0(D/sw/prm/prm_rsrcs/prm-regulator-l15b-e0(D/sw/prm/prm_rsrcs/prm-regulator-l18b-e0'D/sw/prm/prm_rsrcs/prm-regulator-l1d-e0'D/sw/prm/prm_rsrcs/prm-regulator-l2d-e0'D/sw/prm/prm_rsrcs/prm-regulator-l3d-e0'D/sw/prm/prm_rsrcs/prm-regulator-l1f-e0'D/sw/prm/prm_rsrcs/prm-regulator-l7m-e1'D/sw/prm/prm_rsrcs/prm-regulator-l3i-e0(D/sw/prm/prm_rsrcs/prm-regulator-ls1b-e0(D/sw/prm/prm_rsrcs/prm-regulator-ls2b-e0(E/sw/prm/prm_rsrcs/prm-regulator-ls3b-e0(E /sw/prm/prm_rsrcs/prm-regulator-ls4b-e0E/sw/prm/prm-pamE/sw/prm/prm-pam/pcie0 modelcompatible#address-cells#size-cellsproc-namechip-infophandlesupported-hostshostremote-hostfifo-sizemtu-sizeirq-outqos-max-ratechannel-namemailbox-area-size-bytesmaster-mailbox-size-bytesmax-tx-pending-itemsis-mastermailbox-desc-starthost-nameidtransportremote-ssch-nameoptionsprioritystack-sizeintentstx-channelrx-channelhost-idfflagsmax-entriesdestprocirqcore-top-csr-strtcsr-basemutex-offsets-datawonce-offsetsregclientprotocol-nameprotocol-idxinterrupt-parentinterrupts#signalsclient-mappingoffsetout-masktimer-nametimer-freqtimer-numtimer-interruptngpioswidthqcom,strongpullegpiogpio-controller#gpio-cellsinterrupt-typesinterrupt-namessummary-targetprocglobal-ctxt-namemuxconfigqcom,slewrateqcom,sleep-configregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-init-microvoltqcom,resource-nameqcom,all-pd-regulatorqcom,lpr-enableqcom,drv-idreg-names#clock-cellsbase_portnum_portsatidsync_periodtpdm_nametpdatpda_portdatasetcmb_sizecti_channelscti_triggersdbg_regspwrdbg_ctrl_reglpi_funnellpi_funnel_portport_lpass_lpi_dl_tpdaport_lpass_lpi_audio_hm_dl_tpdaport_ddrss_lpi_ddrss_lpi_trace_nocport_lpi_etmport_lpi_stmport_stmport_sdc_etmport_sdc_itmport_lpass_lpi_nocport_lpi_aon_nocport_aocport_enpu0_nocport_enpu1_noccti_nametnoc_idtnoc_funnel_nametpda_nameport_occupied_masktpda_funnel_namevaluellcc-common-regllcc-lcp-regpartial-cachelpi-basescidnum_ssc_qupibi_baseprotocolse_island_configtre_list_sizeibi_se_indexse_modeload_fwdfs_modeclock-namesclocksibi_idgpiigpii_irqmgr_irqstatusqup_idqup_common_offsetse_wrapper_base_offsetcore_frequencyqup_flagsnum_sesdc_gpii_listcore_offsetibi_instancese_flagsFIFO_MODEprotocol_supportedinterface_supportednum_gpiisring_size_multipliercore_irqpdc_irqparent_wakeup_gpioshared_seod_frequencyi2c_hs_i3c_src_freqis_pipeline_enablelog_levelpinctrl-namespinctrl-0pinctrl-1pinctrl-2pinctrl-3pinctrl-4pinctrl-5pinctrl-6pinctrl-7pinctrl-8pinctrl-9i2c_hubnum_top_qupsirq_numqup0_cfgqup1_cfgqup2_cfgqup3_cfgqup4_cfguStructVerpszInstNameuaMasterEApszHwioBaseuHwioBaseOffsetuHwioBasehBamDevuIntIduBamIntIduMyEEsmbus_clksmbus_datauGpioIntNumuaNumEndPointsuaVoltageVotebIsLpiTlmmLAuaEAuDataLineMasknum_device_propstlmm_name_strsvs_npa_stris_masterdefault_clock_gearprog_bam_trustisland_votesubsystem_sleep_votetlmm_offsettlmm_valsvs_npause_gpio_intno_retentionnum_local_portslocal_port_baselocal_channel_baseshared_channel_basenum_local_countersis_lpm_used_for_mgr_bam_translpm_mgr_sb_region_baselpm_mgr_sb_region_sizeis_lpm_sat_sb_region_dump_enablelpm_sat_sb_region_baselpm_sat_sb_region_sizeee_assignrevMmpmCoreIdTypeMmpmCoreInstanceIdTypepClientNamepwrCtrlFlagcallBackFlagMMPM_CallbackcbFcnStackSizegsi_patcsr_addrtcsr_gpii_offsettcsr_irqgpii_interruptsnum_gpiiactivetypeuse-interruptsidmidpmicbidtherm-tbllabelhw-chhw-settleavg-spdec-ratiocal-methodscalingscale-fcnpull-upasidint-tablearr_idhw-common-paramsadctm-hw-paramstrip-rangeinterrupt-controller#interrupt-cellsmessagetest_configtest_bool1test_bool2test_vertest_uint8_listtest_uint16test_uint32test_uint32_listtest_uint64test_stringtest_uint8test_uint8_list_emptytest_uint16_listtest_uint16_list_emptytest_uint32_list_emptytest_uint64_listtest_uint64_list_emptyreg_altPD_indicatortest_oem_entryservice_idinstance_idqdss_service_idpram_namepram_sizept_namewdog_irq_numerr_irq_numcode_ram_addrdata_ram_addrcode_ram_sizedata_ram_sizepram_addrssc_sdc_physpool_addrssc_sdc_physpool_sizeipcmem_physpool_addripcmem_physpool_sizeimage_idxeic_crash_enableeic_crash_typeeic_crash_delaypd_timeout_exit_msecthreshold_timeout_secnum_pdrs_logpd_binary_local_pathpd_binary_remote_pathpd_namepd_mon_install_attrpd_mon_image_sw_idsubdomain_namepd_mon_restart_enablepd_mon_dump_disablercinit_term_err_fatal_enablercinit_term_timeoutrcinit_term_timeout_group_0rcinit_term_timeout_group_1rcinit_term_timeout_group_2rcinit_term_timeout_group_3rcinit_term_timeout_group_4rcinit_term_timeout_group_5rcinit_term_timeout_group_6rcinit_term_timeout_group_7rcinit_term_latency_enableimage_idclient_nameclient_idllccsscid-mapping-regclientsdump-poolsdiag_cmd_request_fdiag_start_stress_test_fdiag_stress_test_loopbackdiag_legacy_health_count_basediag_get_max_req_pkt_lendiag_delay_health_count_basediag_dcm_cmd_reg_test_basediag_ulogdiag_processor_iddiag_subsys_id_basediag_flow_control_count_basediag_dsm_chained_count_basediag_get_cmd_reg_tbldiag_subsys_mask_retrieval_basediag_f3_trace_set_configdiag_tx_mode_configdiag_stress_test_delayed_rspdiag_drop_threshold_configdiag_query_enablediag_get_time_apidiag_get_drop_perdiag_uimage_health_statsdiag_start_stress_test_adv_fdiag_health_stats_basediag_get_set_drain_paramdiag_set_drain_propdiag_health_report_configdiag_get_set_client_settingsdiag_lock_buffer_apidiag_instance_id_basediag_err_ulog_sizediag_debug_ulog_sizediag_cmd_ulog_sizediag_data_ulog_sizediag_qdss_ulog_sizediag_ctrl_ulog_sizediag_listener_ulog_sizediag_sendbuf_dbg_ulog_sizediag_mpd_drain_timer_lendiag_mpd_buf_commit_thresh_perdiag_mpd_buf_drain_thresh_perdiag_event_timer_lendiag_event_rpt_pkt_len_sizediag_event_rpt_pkt_sizediag_drain_timer_lendiag_event_send_maxdiag_event_heap_sizediag_ctrl_send_buf_sizediag_ctrl_read_buf_sizediag_cmd_read_buf_sizediag_event_sec_heap_sizediag_dci_read_buf_sizediag_rsp_heap_sizediag_heap_sizediag_f3_trace_buf_sizediag_buf_sizediag_rsp_alloc_retry_timer_lendiag_mask_notify_timer_lendiag_tx_sleep_threshold_defaultdiag_tx_sleep_time_defaultdiag_core_pd_drain_thresholddiag_sio_timeout_timer_lendiag_cmd_read_tout_timer_lendiag_max_active_listenersdiag_many_drain_per_markdiag_few_drain_per_markdiag_hdlc_pad_lendiag_stress_task_sleep_completediag_buf_commit_thresholddiag_buffer_default_lock_statediag_drop_flow_cnt_incrdiag_drop_per_step_maxdiag_drop_per_threshold_maxdiag_deferrable_timerdiag_deferrable_timer_exdiag_send_data_buf_size_maxdiag_min_send_data_sizediag_msg_fmt_str_arg_sizediag_event_rpt_pkt_len_size_nrtdiag_event_rpt_pkt_size_nrtdiag_event_send_max_nrtdiag_event_timer_len_nrtdiag_tx_sleep_threshold_nrtdiag_tx_sleep_time_nrtdiag_drain_timer_len_nrtdiagbuf_commit_threshold_nrtdiag_mpd_commit_thresh_nrt_perdiag_uimage_drain_timer_lendiag_uimage_buf_high_per_wmdiag_uimage_f3_trace_buf_sizediag_uimage_pooldiag_uimage_test_pooldiag_early_log_controldiag_early_log_maskdiag_early_event_maskdiag_early_message_maskdiag_f3_trace_controldiag_f3_trace_detail_maskdiag_f3_trace_versionTHREAD_NUMBEROVERHANG_VOTE_TIMEOUT_MSDEBUG_LEVELbaseAddrphysAddrcoreIdpwrDomaincoreClockInstancesmasterBusPortInstancesslaveBusPortInstancesnumInstancesmemIdclkIdclkTypeclkCntlTypeclkNameclkSrcIdmemoryIdportConnectionbusClkregProgClocksicbarbMasteraccessPorticbarbSlavemasterPortslavePortpwrDomainNamepwrDomainTypeintrReinitTriggerintrReinitDonesecurityClocksclientNumrouteshw_instancemasterIcbPortslaveIcbPortminindex0index1index2index3index4index5index6index7index8index9index10GlbCtxtHWMutexNumberqcom,prm-queryqcom,prm-publish-rsrcsqcom,prm-rsrc-aliasqcom,prm-vregqcom,prm-controlqcom,prm-typeqcom,pm-indexqcom,pm-sidqcom,pm-bidqcom,prm-clockpam-namepam-mode-countpam-supplypam-modessocipcc_mprocipcc_compute_l0ipcc_compute_l1ipcc_periphipcc_fenceipcc_legacySystemTimerWakeUpTimertlmmibi_i3c_qup1_se4_sclibi_i3c_qup1_se4_sdaibi_i3c_qup1_se7_sclibi_i3c_qup1_se7_sdaibi_i3c_qup2_se0_sclibi_i3c_qup2_se0_sdaibi_i3c_qup2_se1_sclibi_i3c_qup2_se1_sdaibi_i3c_qup3_se1_sclibi_i3c_qup3_se1_sdaibi_i3c_qup3_se2_sclibi_i3c_qup3_se2_sdaibi_i3c_qup4_se0_sclibi_i3c_qup4_se0_sdaibi_i3c_qup4_se1_sclibi_i3c_qup4_se1_sdaibi_i3c_qup4_se2_sclibi_i3c_qup4_se2_sdaqup1_se0_l0qup1_se0_l1qup1_se0_l2qup1_se0_l3qup1_se1_l0qup1_se1_l1qup1_se1_l2qup1_se1_l3qup1_se2_l0qup1_se2_l1qup1_se2_l2qup1_se2_l3qup1_se2_l4qup1_se2_l5qup1_se2_l6qup1_se3_l0qup1_se3_l1qup1_se3_l2qup1_se3_l3qup1_se4_l0qup1_se4_l1qup1_se4_l2qup1_se4_l3qup1_se5_l0qup1_se5_l1qup1_se5_l2qup1_se5_l3qup1_se6_l0qup1_se6_l1qup1_se6_l2qup1_se6_l3qup1_se7_l0qup1_se7_l1qup1_se7_l2qup1_se7_l3qup2_se0_l0qup2_se0_l1qup2_se0_l2qup2_se0_l3qup2_se1_l0qup2_se1_l1qup2_se1_l2qup2_se1_l3qup2_se2_l0qup2_se2_l1qup2_se2_l2qup2_se2_l3qup2_se3_l0qup2_se3_l1qup2_se3_l2qup2_se3_l3qup2_se4_l0qup2_se4_l1qup2_se4_l2qup2_se4_l3qup3_se0_l0qup3_se0_l1qup3_se0_l2qup3_se0_l3qup3_se1_l0qup3_se1_l1qup3_se1_l2qup3_se1_l3qup3_se1_l4qup3_se1_l5qup3_se1_l6qup3_se2_l0qup3_se2_l1qup3_se2_l2qup3_se2_l3qup3_se3_l0qup3_se3_l1qup3_se3_l2qup3_se3_l3qup3_se4_l0qup3_se4_l1qup3_se4_l2qup3_se4_l3qup3_se4_l6qup3_se5_l0qup3_se5_l1qup3_se5_l2qup3_se5_l3qup4_se0_l0qup4_se0_l1qup4_se0_l2qup4_se0_l3qup4_se1_l0qup4_se1_l1qup4_se1_l2qup4_se1_l3qup4_se2_l0qup4_se2_l1qup4_se2_l2qup4_se2_l3qup4_se3_l0qup4_se3_l1qup4_se3_l2qup4_se3_l3qup4_se4_l0qup4_se4_l1qup4_se4_l2qup4_se4_l3top_qup1_se0_i2c_activetop_qup1_se0_i2c_sleeptop_qup1_se0_spi_activetop_qup1_se0_spi_sleeptop_qup1_se0_uart_activetop_qup1_se0_uart_sleeptop_qup1_se1_i2c_activetop_qup1_se1_i2c_sleeptop_qup1_se1_spi_activetop_qup1_se1_spi_sleeptop_qup1_se1_uart_activetop_qup1_se1_uart_sleeptop_qup1_se2_i2c_activetop_qup1_se2_i2c_sleeptop_qup1_se2_spi_activetop_qup1_se2_spi_sleeptop_qup1_se2_uart_activetop_qup1_se2_uart_sleeptop_qup1_se3_i2c_activetop_qup1_se3_i2c_sleeptop_qup1_se3_spi_activetop_qup1_se3_spi_sleeptop_qup1_se3_uart_activetop_qup1_se3_uart_sleeptop_qup1_se4_i2c_activetop_qup1_se4_i2c_sleeptop_qup1_se4_i3c_activetop_qup1_se4_i3c_sleeptop_qup1_se4_i3c_ibi_activetop_qup1_se4_i3c_ibi_sleeptop_qup1_se4_spi_activetop_qup1_se4_spi_sleeptop_qup1_se4_uart_activetop_qup1_se4_uart_sleeptop_qup1_se5_i2c_activetop_qup1_se5_i2c_sleeptop_qup1_se5_spi_activetop_qup1_se5_spi_sleeptop_qup1_se5_uart_activetop_qup1_se5_uart_sleeptop_qup1_se6_i2c_activetop_qup1_se6_i2c_sleeptop_qup1_se6_spi_activetop_qup1_se6_spi_sleeptop_qup1_se6_uart_activetop_qup1_se6_uart_sleeptop_qup1_se7_i2c_activetop_qup1_se7_i2c_sleeptop_qup1_se7_i3c_activetop_qup1_se7_i3c_sleeptop_qup1_se7_i3c_ibi_activetop_qup1_se7_i3c_ibi_sleeptop_qup1_se7_spi_activetop_qup1_se7_spi_sleeptop_qup1_se7_uart_activetop_qup1_se7_uart_sleeptop_qup2_se0_i2c_activetop_qup2_se0_i2c_sleeptop_qup2_se0_i3c_activetop_qup2_se0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x8 ( Xqcom,kaanapaliqcom,kaanapali board-id!,audio_process-kaanapali-1.0-adsp6soc @cxstmtrace@16000000qcom,stmtraceHLV@lpistmtrace@7100000qcom,stmtraceHLV@sw@corecpt_boot_test ``lwtest1 lw*My Secret Message, Please keep it secret!test2test_typesU 󵳥U#44VxeC!%(<穣4VxܺvT2Mtest_pic_3 qcom,picd test_uart1 qcom,uartd  lbaserxtxtest_uart2 qcom,uartd PD_Access_controlvUOEM_Flavor_Validationmprocqmiqcsiqcom,qmi_qcsi_user_pd_configqmi_qcsi_ping_server_config!debugtraceqcom,debugtrace debugtoolstms_diagqcom,tms_diageic qcom,eicZversion_tblqcom,image_version_tbl_idxservicestunadynamic_heapqcom,dynamic_heapclient_id_configclient_id_00DYNAMIC_MEM_CLIENT_ID_SENSORclient_id_01DYNAMIC_MEM_CLIENT_ID_TESTpowerqdsp_pmpdqcom,pd-audio-processdiagqcom,audio_user_diagcfgdiagcfg_cmd&g6iI=g diagcfg_param "6Pe23Ib| AUDIO_ISLAND_TCM_PHYSPOOLQSH_ISLAND_POOL__symbols__/soc/sw modelcompatible#address-cells#size-cellsproc-namechip-infophandleregbase_portnum_portstest_configtest_bool1test_bool2test_vertest_uint8_listtest_uint16test_uint32test_uint32_listtest_uint64test_stringtest_uint8test_uint8_list_emptytest_uint16_listtest_uint16_list_emptytest_uint32_list_emptytest_uint64_listtest_uint64_list_emptyreg_altreg-namesPD_indicatortest_oem_entryservice_idinstance_idqdss_service_idimage_ideic_crash_enableeic_crash_typeeic_crash_delayimage_idxclient_nameclient_idQDI_QDSP_PM_USER_IDdiag_test_cmd_fdiag_v2_test_cmd_fdiag_legacy_health_count_basediag_ulogdiag_processor_iddiag_subsys_id_basediag_lsm_cmd_reg_test_basediag_get_set_drain_paramdiag_f3_trace_set_configdiag_health_stats_basediag_err_ulog_sizediag_debug_ulog_sizediag_qdss_ulog_sizediag_logtracker_ulog_sizediag_event_timer_lendiag_event_rpt_pkt_len_sizediag_event_rpt_pkt_sizediag_event_send_maxdiag_multipd_buf_sizediag_multipd_event_heap_sizediag_send_buf_size_data_userpddiag_lsm_stack_sizediag_stress_task_sleep_completediag_deferrable_timerdiag_deferrable_timer_exdiag_msg_fmt_str_arg_sizediag_uimage_mpd_buf_sizediag_uimage_f3_trace_buf_sizediag_uimage_pooldiag_uimage_test_poolsocsw 8 ( qcom,kaanapaliqcom,kaanapali board-id,qsh_process-kaanapali-1.0-adsp6soc @cxstmtrace@16000000qcom,stmtraceHL@V@lpistmtrace@7100000qcom,stmtraceHL@V@sw@corecpt_boot_testPD_Access_control`XOEM_Flavor_Validationmmprocqmiqcsiqcom,qmi_qcsi_user_pd_configqmi_qcsi_ping_server_config|"debugtraceqcom,debugtrace productssdcloaderqcom,sdcloadersdc_params<asdc_physpool*'P?powerqdsp_pmpdqcom,pd-qsh-processTdebugtoolstms_diagqcom,tms_diagheic qcom,eicqZversion_tblqcom,image_version_tbl_idxservicestunadynamic_heapqcom,dynamic_heapclient_id_configclient_id_00DYNAMIC_MEM_CLIENT_ID_SENSORclient_id_01DYNAMIC_MEM_CLIENT_ID_TESTdiagqcom,sensor_user_diagcfgdiagcfg_cmdhj=1Le ~'diagcfg_param 42H^{0 NQSH_ISLAND_POOL_QSH_ISLAND_POOLqup_user_pd_featureqcom,sw-qup-user-pd-controlleru__symbols__/soc/sw modelcompatible#address-cells#size-cellsproc-namechip-infophandleregbase_portnum_portsPD_indicatortest_oem_entryservice_idinstance_idqdss_service_idwdog_irq_numerr_irq_numcode_ram_addrdata_ram_addrcode_ram_sizedata_ram_sizepram_addrssc_sdc_physpool_addrssc_sdc_physpool_sizeipcmem_physpool_addripcmem_physpool_sizeQDI_QDSP_PM_USER_IDimage_ideic_crash_enableeic_crash_typeeic_crash_delayimage_idxclient_nameclient_iddiag_test_cmd_fdiag_v2_test_cmd_fdiag_legacy_health_count_basediag_ulogdiag_processor_iddiag_subsys_id_basediag_lsm_cmd_reg_test_basediag_get_set_drain_paramdiag_f3_trace_set_configdiag_health_stats_basediag_err_ulog_sizediag_debug_ulog_sizediag_qdss_ulog_sizediag_logtracker_ulog_sizediag_event_timer_lendiag_event_rpt_pkt_len_sizediag_event_rpt_pkt_sizediag_event_send_maxdiag_multipd_buf_sizediag_multipd_event_heap_sizediag_send_buf_size_data_userpddiag_lsm_stack_sizediag_stress_task_sleep_completediag_deferrable_timerdiag_deferrable_timer_exdiag_msg_fmt_str_arg_sizediag_uimage_mpd_buf_sizediag_uimage_f3_trace_buf_sizediag_uimage_pooldiag_uimage_test_pooluser_pd_island_enabledsocsw H8(Eqcom,kaanapaliqcom,kaanapali board-id,ois_process-kaanapali-1.0-adsp6soc @sw@corecpt_boot_testPD_Access_controlH`OEM_Flavor_ValidationUmprocqmiqcsiqcom,qmi_qcsi_user_pd_configqmi_qcsi_ping_server_configdo$debugtoolstms_diagqcom,tms_diag{Peic qcom,eicZversion_tblqcom,image_version_tbl_idxpowerqdsp_pmpdqcom,pd-ois-processservicestunadynamic_heapqcom,dynamic_heapclient_id_configclient_id_00DYNAMIC_MEM_CLIENT_ID_SENSORclient_id_01DYNAMIC_MEM_CLIENT_ID_TESTdiagqcom,ois_user_diagcfgdiagcfg_cmd{| =)DXs diagcfg_param 'C[2o $__symbols__>/socB/sw modelcompatible#address-cells#size-cellsproc-namechip-infophandlePD_indicatortest_oem_entryservice_idinstance_idimage_ideic_crash_enableeic_crash_typeeic_crash_delayimage_idxQDI_QDSP_PM_USER_IDclient_nameclient_iddiag_test_cmd_fdiag_v2_test_cmd_fdiag_legacy_health_count_basediag_ulogdiag_processor_iddiag_subsys_id_basediag_lsm_cmd_reg_test_basediag_get_set_drain_paramdiag_f3_trace_set_configdiag_health_stats_basediag_err_ulog_sizediag_debug_ulog_sizediag_qdss_ulog_sizediag_logtracker_ulog_sizediag_event_timer_lendiag_event_rpt_pkt_len_sizediag_event_rpt_pkt_sizediag_event_send_maxdiag_multipd_buf_sizediag_multipd_event_heap_sizediag_send_buf_size_data_userpddiag_lsm_stack_sizediag_stress_task_sleep_completediag_deferrable_timerdiag_deferrable_timer_exdiag_msg_fmt_str_arg_sizesocsw  8(;qcom,kaanapaliqcom,kaanapaliboard-iddefault_process% 0 modelcompatibleproc-namechip-infoboard-infois-overlayh SVU<27 ;o7İUF8}i 6VEË%NEh\mFm.i+KxZN i wI\%m|YgJGD+0e1ch,h2jKctxlɼp+Ԉg6e00}J~Ug3٢04ЁPWXHVA|00:0 *H=01 0 UUS1,0*U#SECTOOLS SECP384R1 CURVE TEST ROOT010U San Diego10U QUALCOMM10U CDMA Technologies1200U )General Use Test Key 0 (for testing only)0 260618121457Z 460613121457Z0f1 0 UUS10U California10USecTools Test User10U SecTools10U San Diego0v0*H=+"b$8 EBu NE!lc#JۨAvQNIΘ8Zx5SLbGn{ޛn&o0m0U#0wDM2@tXϙL0 U00 U0U% 0 +0UrkO(=IAB6>eLeV00 *H=h0e0sδ5d0\'UN1=?OLȷv&G0z1鲄79: NJVnN}oۿ !2}[#_\ }Q{00u0 *H=01 0 UUS1+0)U"SECTOOLS SECP384R1 CURVE TEST ROOT10U San Diego10U QUALCOMM10U CDMA Technologies100.U 'General Use Test Key (for testing only)0 160321215215Z 360316215215Z01 0 UUS1,0*U#SECTOOLS SECP384R1 CURVE TEST ROOT010U San Diego10U QUALCOMM10U CDMA Technologies1200U )General Use Test Key 0 (for testing only)0v0*H=+"bT}I%O[Hp] f{I/C#9g@qKx?jEyAsԜh'$,H peypyP5`0^0U#0oq' s ֟>qb0UwDM2@tXϙL0U00 U0 *H=i0f1‚_H9<} ͣb:v࣮^6+<[61ftWzcvž$ֱ(9 @n)f>F߲400N0 *H=01 0 UUS1+0)U"SECTOOLS SECP384R1 CURVE TEST ROOT10U San Diego10U QUALCOMM10U CDMA Technologies100.U 'General Use Test Key (for testing only)0 160321215211Z 360316215211Z01 0 UUS1+0)U"SECTOOLS SECP384R1 CURVE TEST ROOT10U San Diego10U QUALCOMM10U CDMA Technologies100.U 'General Use Test Key (for testing only)0v0*H=+"b3x~ ҩ/פ{Pyjh`7_줎j^K1o$lTg ]ء[SQq6 /PZoT:ާ%i1>}`<0:0Uoq' s ֟>qb0 U00 U0 *H=h0e0u(C9uT(&\LGaT׍),$Wusr/lib/firmware/qcom/glymur/adsp_dtb.mbn000064400000667470152532351460014525 0ustar00ELF(44 XX`88 8a0(0` qcom,glymur qcom,glymur board-id ,default_process-glymur-1.0-adsp6soc @ipcc  qcom,ipccipcc@3e02000qcom,ipcc-protocolHLSMPROCanyD!":;<-.78@ipcc@3e40000qcom,ipcc-protocolHL SCOMPUTE_L0anN 0 !" -.@ipcc@3e80000qcom,ipcc-protocolHL SCOMPUTE_L1an 0 !" -.@ipcc@3ec0000qcom,ipcc-protocolHLSPERIPHan D !",-.78@ipcc_legacy@6888004H@ipcc_legacy_sdcqcom,ipcc-legacyLn89:; @timetick timer@68a2000qcom,timetickH  SystemTimer$@timer@68a3000qcom,timetickH0 WakeUpTimer$@pinctrl@f100000!qcom,glymur-pinctrlqcom,pinctrlHn>OVBu$}P4summarydirectconn0directconn1directconn2directconn3directconn4directconn5D WGPIOINTADSP@zqup0_se0_l0h@qup0_se0_l1h@qup0_se0_l2h@qup0_se0_l3h@qup0_se1_l0h@qup0_se1_l1h@qup0_se1_l2h@qup0_se1_l3h@qup0_se2_l0h@qup0_se2_l1h @qup0_se2_l2h @qup0_se2_l3h @qup0_se2_l4h@qup0_se2_l5h@qup0_se2_l6h@qup0_se3_l0h @qup0_se3_l1h @qup0_se3_l2h@qup0_se3_l3h@qup0_se3_l4h@qup0_se3_l5h@qup0_se3_l6h@qup0_se4_l0h@qup0_se4_l1h@qup0_se4_l2h@qup0_se4_l3h@qup0_se5_l0h@qup0_se5_l1h@qup0_se5_l2h@qup0_se5_l3h@qup0_se6_l0h@qup0_se6_l1h@qup0_se6_l2h@qup0_se6_l3h@qup0_se7_l0h@qup0_se7_l1h@qup0_se7_l2h @qup0_se7_l3h @qup1_se0_l0h @qup1_se0_l1h!@qup1_se0_l2h"@qup1_se0_l3h#@qup1_se1_l0h$@qup1_se1_l1h%@qup1_se1_l2h&@qup1_se1_l3h'@qup1_se2_l0h(@qup1_se2_l1h)@qup1_se2_l2h*@qup1_se2_l3h+@qup1_se2_l4h1@qup1_se2_l5h2@qup1_se2_l6h3@qup1_se3_l0h,@qup1_se3_l1h-@qup1_se3_l2h.@qup1_se3_l3h/@qup1_se3_l4h!@qup1_se3_l5h"@qup1_se3_l6h#@qup1_se4_l0h0@qup1_se4_l1h1@qup1_se4_l2h2@qup1_se4_l3h3@qup1_se5_l0h4@qup1_se5_l1h5@qup1_se5_l2h6@qup1_se5_l3h7@qup1_se6_l0h8@qup1_se6_l1h9@qup1_se6_l2h:@qup1_se6_l3h;@qup1_se7_l0h6@qup1_se7_l1h7@qup1_se7_l2h4@qup1_se7_l3h5@qup2_se0_l0h@@qup2_se0_l1hA@qup2_se0_l2hB@qup2_se0_l3hC@qup2_se1_l0hD@qup2_se1_l1hE@qup2_se1_l2hF@qup2_se1_l3hG@qup2_se2_l0hH@qup2_se2_l1hI@qup2_se2_l2hJ@qup2_se2_l3hK@qup2_se2_l4hQ@qup2_se2_l5hR@qup2_se2_l6hS@qup2_se3_l0hL@qup2_se3_l1hM@qup2_se3_l2hN@qup2_se3_l3hO@qup2_se3_l4hA@qup2_se3_l5hB@qup2_se3_l6hC@qup2_se4_l0hP@qup2_se4_l1hQ@qup2_se4_l2hR@qup2_se4_l3hS@qup2_se5_l0hT@qup2_se5_l1hU@qup2_se5_l2hV@qup2_se5_l3hW@qup2_se6_l0hX@qup2_se6_l1hY@qup2_se6_l2hZ@qup2_se6_l3h[@qup2_se7_l0hP@qup2_se7_l1hQ@qup2_se7_l2hR@qup2_se7_l3hS@qup3_se0_l0h@qup3_se0_l1h@qup3_se0_l2h@qup3_se0_l3h@qup3_se0_l4h@qup3_se0_l5h@qup3_se0_l6h@qup3_se0_l7h@qup3_se1_l0h(@qup3_se1_l1h)@qup3_se1_l2h*@qup3_se1_l3h+@qup3_se1_l4h1@qup3_se1_l5h2@qup3_se1_l6h3@qup3_se1_l7h0@GPIO_config_activel@{GPIO_config_idlel@|GPIO_config_sleepl @}GPIO_config_wakel @~pinctrl@7760000!qcom,glymur-pinctrlqcom,pinctrlHvslEEEEEEEEEEEEEEEEEEEEEEEEEEE@ slimbus_clkh@slimbus_datah@slimbus_default_gpio_cfgl!!@ypinctrl@75C0000!qcom,glymur-pinctrlqcom,pinctrlH\-aaEEQQEEaaEEEEIEQQEEEEEEEEEEEEEEEEEEEEQQEEEEE@ ssc_gpio_10_clkh @ ssc_gpio_11_clkh @ ssc_gpio_12_clkh @ ssc_gpio_13_clkh @ssc_gpio_18_clkh@ssc_gpio_19_clkh@ssc_gpio_24_clkh@ssc_gpio_25_clkh@ssc_gpio_26_clk_reservedh@ssc_gpio_27_clk_reservedh@ssc_gpio_28_clk_reservedh@ssc_gpio_29_clk_reservedh@ssc_gpio_30_clk_reservedh@ssc_gpio_31_clk_reservedh@ssc_gpio_34_clk_reservedh"@ssc_gpio_35_clk_reservedh#@ssc_gpio_6_clkh@ssc_gpio_7_clkh@ssc_qupv3_se0_0h@ssc_qupv3_se0_1h@ssc_qupv3_se10_0h@!ssc_qupv3_se10_1h@"ssc_qupv3_se10_2h@#ssc_qupv3_se10_3h@$ssc_qupv3_se11_0_reservedh@ssc_qupv3_se11_1_reservedh@ssc_qupv3_se11_2_reservedh@ssc_qupv3_se11_3_reservedh@ ssc_qupv3_se12_0_reservedh@!ssc_qupv3_se12_1_reservedh@"ssc_qupv3_se13_0_reservedh @#ssc_qupv3_se13_1_reservedh!@$ssc_qupv3_se13_2_reservedh"@%ssc_qupv3_se13_3_reservedh#@&ssc_qupv3_se14_0_reservedh$@'ssc_qupv3_se14_1_reservedh%@(ssc_qupv3_se1_0h@ssc_qupv3_se1_1h@ssc_qupv3_se1_2_reservedh@)ssc_qupv3_se1_3_reservedh@*ssc_qupv3_se2_0h@ ssc_qupv3_se2_1h@ ssc_qupv3_se2_2h@ ssc_qupv3_se2_3h@ ssc_qupv3_se2_4h@+ssc_qupv3_se2_5h @,ssc_qupv3_se3_0h@ ssc_qupv3_se3_1h @ssc_qupv3_se4_0h @ssc_qupv3_se4_1h @ssc_qupv3_se4_2h @ssc_qupv3_se4_3h @ssc_qupv3_se4_4h@-ssc_qupv3_se4_5h@.ssc_qupv3_se5_0h@ssc_qupv3_se5_1h@ssc_qupv3_se5_2h@ssc_qupv3_se5_3h@ssc_qupv3_se6_0h@ssc_qupv3_se6_1h@ssc_qupv3_se6_2h@ssc_qupv3_se6_3h@ssc_qupv3_se7_0h@ssc_qupv3_se7_1h@ssc_qupv3_se7_2h@ssc_qupv3_se7_3h@ssc_qupv3_se8_0h@ssc_qupv3_se8_1h@ ssc_qupv3_se9_0_reservedh@/ssc_qupv3_se9_1_reservedh@0qup_ssc0_se0_i2c_activel@1qup_ssc0_se0_i2c_sleepl@2qup_ssc0_se0_i3c_activel  @3qup_ssc0_se0_i3c_sleepl!!@4qup_ssc0_se0_i3c_ibi_activel  @5qup_ssc0_se0_i3c_ibi_sleepl!!@6qup_ssc0_se1_i2c_activel@7qup_ssc0_se1_i2c_sleepl@8qup_ssc0_se1_i3c_activel  @9qup_ssc0_se1_i3c_sleepl!!@:qup_ssc0_se1_i3c_ibi_activel  @;qup_ssc0_se1_i3c_ibi_sleepl!!@<qup_ssc0_se2_i2c_activel  @=qup_ssc0_se2_i2c_sleepl  @>qup_ssc0_se2_i3c_activel @?qup_ssc0_se2_i3c_sleepl ! !@@qup_ssc0_se2_i3c_ibi_activel @Aqup_ssc0_se2_i3c_ibi_sleepl ! !@Bqup_ssc0_se2_spi_active l X X X X@Cqup_ssc0_se2_spi_sleep l ! ! ! !@Dqup_ssc0_se2_uart_active l    @Equp_ssc0_se2_uart_sleep l    @Fqup_ssc0_se3_i2c_activel @Gqup_ssc0_se3_i2c_sleepl @Hqup_ssc0_se3_i3c_activel  @Iqup_ssc0_se3_i3c_sleepl !!@Jqup_ssc0_se3_i3c_ibi_activel  @Kqup_ssc0_se3_i3c_ibi_sleepl !!@Lqup_ssc0_se4_i2c_activel@Mqup_ssc0_se4_i2c_sleepl@Nqup_ssc0_se4_spi_active lXXXX@Oqup_ssc0_se4_spi_sleep l!!!!@Pqup_ssc0_se4_uart_active l@Qqup_ssc0_se4_uart_sleep l@Rqup_ssc0_se5_i2c_activel@Squp_ssc0_se5_i2c_sleepl@Tqup_ssc0_se5_i3c_activel  @Uqup_ssc0_se5_i3c_sleepl!!@Vqup_ssc0_se5_i3c_ibi_activel  @Wqup_ssc0_se5_i3c_ibi_sleepl!!@Xqup_ssc0_se5_spi_active lXXXX@Yqup_ssc0_se5_spi_sleep l!!!!@Zqup_ssc0_se5_uart_active l@[qup_ssc0_se5_uart_sleep l@\qup_ssc0_se6_i2c_activel@]qup_ssc0_se6_i2c_sleepl@^qup_ssc0_se6_i3c_activel  @_qup_ssc0_se6_i3c_sleepl!!@`qup_ssc0_se6_i3c_ibi_activel  @aqup_ssc0_se6_i3c_ibi_sleepl!!@bqup_ssc0_se6_spi_active lXXXX@cqup_ssc0_se6_spi_sleep l!!!!@dqup_ssc0_se6_uart_active l@equp_ssc0_se6_uart_sleep l@fqup_ssc0_se7_i2c_activel@gqup_ssc0_se7_i2c_sleepl@hqup_ssc0_se7_spi_active lXXXX@iqup_ssc0_se7_spi_sleep l!!!!@jqup_ssc0_se7_uart_active l@kqup_ssc0_se7_uart_sleep l@lqup_ssc0_se8_i2c_activel @mqup_ssc0_se8_i2c_sleepl @nqup_ssc0_se8_i3c_activel @oqup_ssc0_se8_i3c_sleepl! !@pqup_ssc0_se8_i3c_ibi_activel @qqup_ssc0_se8_i3c_ibi_sleepl! !@rqup_ssc0_se10_i2c_activel!"@squp_ssc0_se10_i2c_sleepl!"@tqup_ssc0_se10_spi_active l!X"X#X$X@uqup_ssc0_se10_spi_sleep l!!"!#!$!@vqup_ssc0_se10_uart_active l!"#$@wqup_ssc0_se10_uart_sleep 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0@//0GCC_GPLL0_CM_PLL_TAYCAN_COMMONGCC_GPLL1_CM_PLL_TAYCAN_COMMONGCC_GPLL2_CM_PLL_TAYCAN_COMMONGCC_GPLL3_CM_PLL_TAYCAN_COMMONGCC_GPLL4_CM_PLL_TAYCAN_COMMONGCC_GPLL5_CM_PLL_TAYCAN_COMMONGCC_GPLL6_CM_PLL_TAYCAN_COMMONGCC_GPLL7_CM_PLL_TAYCAN_COMMONGCC_GPLL8_CM_PLL_TAYCAN_COMMONGCC_GPLL9_CM_PLL_TAYCAN_COMMONGCC_GPLL10_CM_PLL_ZONDA_COMMONGCC_GPLL11_CM_PLL_ZONDA_COMMONGCC_GPLL12_CM_PLL_ZONDA_COMMONGCC_GPLL13_CM_PLL_ZONDA_COMMONGCC_GPLL14_CM_PLL_TAYCAN_COMMONGCC_GPLL15_CM_PLL_TAYCAN_COMMONGCC_GPLL16_CM_PLL_TAYCAN_COMMONGCC_GPLL17_CM_PLL_TAYCAN_COMMONGCC_GPLL18_CM_PLL_TAYCAN_COMMONGCC_GPLL19_CM_PLL_TAYCAN_COMMONGCC_JBIST_CM_PLL_JBIST4_COMMONGCC_AHB2PHY_SWMANGCC_AHB2PHY_BROADCAST_SWMANGCC_CLK_CTL_REGGCC_RPU_RPUQ11_512_CL36L12_LEGCC_RPU_XPU4:@6clock-controller@1f40000(qcom,lpass_aon_cc-glymurqcom,cc-glymurPH  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/soc/pinctrl@f100000/qup1_se0_l2!/soc/pinctrl@f100000/qup1_se0_l3!#/soc/pinctrl@f100000/qup1_se1_l0!//soc/pinctrl@f100000/qup1_se1_l1!;/soc/pinctrl@f100000/qup1_se1_l2!G/soc/pinctrl@f100000/qup1_se1_l3!S/soc/pinctrl@f100000/qup1_se2_l0!_/soc/pinctrl@f100000/qup1_se2_l1!k/soc/pinctrl@f100000/qup1_se2_l2!w/soc/pinctrl@f100000/qup1_se2_l3!/soc/pinctrl@f100000/qup1_se2_l4!/soc/pinctrl@f100000/qup1_se2_l5!/soc/pinctrl@f100000/qup1_se2_l6!/soc/pinctrl@f100000/qup1_se3_l0!/soc/pinctrl@f100000/qup1_se3_l1!/soc/pinctrl@f100000/qup1_se3_l2!/soc/pinctrl@f100000/qup1_se3_l3!/soc/pinctrl@f100000/qup1_se3_l4!/soc/pinctrl@f100000/qup1_se3_l5!/soc/pinctrl@f100000/qup1_se3_l6!/soc/pinctrl@f100000/qup1_se4_l0!/soc/pinctrl@f100000/qup1_se4_l1!/soc/pinctrl@f100000/qup1_se4_l2!/soc/pinctrl@f100000/qup1_se4_l3!+/soc/pinctrl@f100000/qup1_se5_l0!7/soc/pinctrl@f100000/qup1_se5_l1!C/soc/pinctrl@f100000/qup1_se5_l2!O/soc/pinctrl@f100000/qup1_se5_l3![/soc/pinctrl@f100000/qup1_se6_l0!g/soc/pinctrl@f100000/qup1_se6_l1!s/soc/pinctrl@f100000/qup1_se6_l2!/soc/pinctrl@f100000/qup1_se6_l3!/soc/pinctrl@f100000/qup1_se7_l0!/soc/pinctrl@f100000/qup1_se7_l1!/soc/pinctrl@f100000/qup1_se7_l2!/soc/pinctrl@f100000/qup1_se7_l3!/soc/pinctrl@f100000/qup2_se0_l0!/soc/pinctrl@f100000/qup2_se0_l1!/soc/pinctrl@f100000/qup2_se0_l2!/soc/pinctrl@f100000/qup2_se0_l3!/soc/pinctrl@f100000/qup2_se1_l0!/soc/pinctrl@f100000/qup2_se1_l1! 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'/soc/pinctrl@f100000/qup2_se2_l1! 3/soc/pinctrl@f100000/qup2_se2_l2! ?/soc/pinctrl@f100000/qup2_se2_l3! K/soc/pinctrl@f100000/qup2_se2_l4! W/soc/pinctrl@f100000/qup2_se2_l5! c/soc/pinctrl@f100000/qup2_se2_l6! o/soc/pinctrl@f100000/qup2_se3_l0! {/soc/pinctrl@f100000/qup2_se3_l1! /soc/pinctrl@f100000/qup2_se3_l2! /soc/pinctrl@f100000/qup2_se3_l3! /soc/pinctrl@f100000/qup2_se3_l4! /soc/pinctrl@f100000/qup2_se3_l5! /soc/pinctrl@f100000/qup2_se3_l6! /soc/pinctrl@f100000/qup2_se4_l0! /soc/pinctrl@f100000/qup2_se4_l1! /soc/pinctrl@f100000/qup2_se4_l2! /soc/pinctrl@f100000/qup2_se4_l3! /soc/pinctrl@f100000/qup2_se5_l0! /soc/pinctrl@f100000/qup2_se5_l1!! /soc/pinctrl@f100000/qup2_se5_l2!!/soc/pinctrl@f100000/qup2_se5_l3!!#/soc/pinctrl@f100000/qup2_se6_l0!!//soc/pinctrl@f100000/qup2_se6_l1!!;/soc/pinctrl@f100000/qup2_se6_l2!!G/soc/pinctrl@f100000/qup2_se6_l3!!S/soc/pinctrl@f100000/qup2_se7_l0!!_/soc/pinctrl@f100000/qup2_se7_l1!!k/soc/pinctrl@f100000/qup2_se7_l2!!w/soc/pinctrl@f100000/qup2_se7_l3!!/soc/pinctrl@f100000/qup3_se0_l0!!/soc/pinctrl@f100000/qup3_se0_l1!!/soc/pinctrl@f100000/qup3_se0_l2!!/soc/pinctrl@f100000/qup3_se0_l3!!/soc/pinctrl@f100000/qup3_se0_l4!!/soc/pinctrl@f100000/qup3_se0_l5!!/soc/pinctrl@f100000/qup3_se0_l6!!/soc/pinctrl@f100000/qup3_se0_l7!!/soc/pinctrl@f100000/qup3_se1_l0!!/soc/pinctrl@f100000/qup3_se1_l1!!/soc/pinctrl@f100000/qup3_se1_l2!"/soc/pinctrl@f100000/qup3_se1_l3!"/soc/pinctrl@f100000/qup3_se1_l4!"/soc/pinctrl@f100000/qup3_se1_l5!"+/soc/pinctrl@f100000/qup3_se1_l6!"7/soc/pinctrl@f100000/qup3_se1_l7("C/soc/pinctrl@f100000/GPIO_config_active&"V/soc/pinctrl@f100000/GPIO_config_idle'"g/soc/pinctrl@f100000/GPIO_config_sleep&"y/soc/pinctrl@f100000/GPIO_config_wake"/soc/pinctrl@7760000!"/soc/pinctrl@7760000/slimbus_clk""/soc/pinctrl@7760000/slimbus_data."/soc/pinctrl@7760000/slimbus_default_gpio_cfg"/soc/pinctrl@75C0000%"/soc/pinctrl@75C0000/ssc_gpio_10_clk%"/soc/pinctrl@75C0000/ssc_gpio_11_clk%"/soc/pinctrl@75C0000/ssc_gpio_12_clk%"/soc/pinctrl@75C0000/ssc_gpio_13_clk%#/soc/pinctrl@75C0000/ssc_gpio_18_clk%#/soc/pinctrl@75C0000/ssc_gpio_19_clk%#./soc/pinctrl@75C0000/ssc_gpio_24_clk%#>/soc/pinctrl@75C0000/ssc_gpio_25_clk.#N/soc/pinctrl@75C0000/ssc_gpio_26_clk_reserved.#g/soc/pinctrl@75C0000/ssc_gpio_27_clk_reserved.#/soc/pinctrl@75C0000/ssc_gpio_28_clk_reserved.#/soc/pinctrl@75C0000/ssc_gpio_29_clk_reserved.#/soc/pinctrl@75C0000/ssc_gpio_30_clk_reserved.#/soc/pinctrl@75C0000/ssc_gpio_31_clk_reserved.#/soc/pinctrl@75C0000/ssc_gpio_34_clk_reserved.#/soc/pinctrl@75C0000/ssc_gpio_35_clk_reserved$$/soc/pinctrl@75C0000/ssc_gpio_6_clk$$%/soc/pinctrl@75C0000/ssc_gpio_7_clk%$4/soc/pinctrl@75C0000/ssc_qupv3_se0_0%$D/soc/pinctrl@75C0000/ssc_qupv3_se0_1&$T/soc/pinctrl@75C0000/ssc_qupv3_se10_0&$e/soc/pinctrl@75C0000/ssc_qupv3_se10_1&$v/soc/pinctrl@75C0000/ssc_qupv3_se10_2&$/soc/pinctrl@75C0000/ssc_qupv3_se10_3/$/soc/pinctrl@75C0000/ssc_qupv3_se11_0_reserved/$/soc/pinctrl@75C0000/ssc_qupv3_se11_1_reserved/$/soc/pinctrl@75C0000/ssc_qupv3_se11_2_reserved/$/soc/pinctrl@75C0000/ssc_qupv3_se11_3_reserved/%/soc/pinctrl@75C0000/ssc_qupv3_se12_0_reserved/%/soc/pinctrl@75C0000/ssc_qupv3_se12_1_reserved/%4/soc/pinctrl@75C0000/ssc_qupv3_se13_0_reserved/%N/soc/pinctrl@75C0000/ssc_qupv3_se13_1_reserved/%h/soc/pinctrl@75C0000/ssc_qupv3_se13_2_reserved/%/soc/pinctrl@75C0000/ssc_qupv3_se13_3_reserved/%/soc/pinctrl@75C0000/ssc_qupv3_se14_0_reserved/%/soc/pinctrl@75C0000/ssc_qupv3_se14_1_reserved%%/soc/pinctrl@75C0000/ssc_qupv3_se1_0%%/soc/pinctrl@75C0000/ssc_qupv3_se1_1.%/soc/pinctrl@75C0000/ssc_qupv3_se1_2_reserved.& /soc/pinctrl@75C0000/ssc_qupv3_se1_3_reserved%&"/soc/pinctrl@75C0000/ssc_qupv3_se2_0%&2/soc/pinctrl@75C0000/ssc_qupv3_se2_1%&B/soc/pinctrl@75C0000/ssc_qupv3_se2_2%&R/soc/pinctrl@75C0000/ssc_qupv3_se2_3%&b/soc/pinctrl@75C0000/ssc_qupv3_se2_4%&r/soc/pinctrl@75C0000/ssc_qupv3_se2_5%&/soc/pinctrl@75C0000/ssc_qupv3_se3_0%&/soc/pinctrl@75C0000/ssc_qupv3_se3_1%&/soc/pinctrl@75C0000/ssc_qupv3_se4_0%&/soc/pinctrl@75C0000/ssc_qupv3_se4_1%&/soc/pinctrl@75C0000/ssc_qupv3_se4_2%&/soc/pinctrl@75C0000/ssc_qupv3_se4_3%&/soc/pinctrl@75C0000/ssc_qupv3_se4_4%&/soc/pinctrl@75C0000/ssc_qupv3_se4_5%'/soc/pinctrl@75C0000/ssc_qupv3_se5_0%'/soc/pinctrl@75C0000/ssc_qupv3_se5_1%'"/soc/pinctrl@75C0000/ssc_qupv3_se5_2%'2/soc/pinctrl@75C0000/ssc_qupv3_se5_3%'B/soc/pinctrl@75C0000/ssc_qupv3_se6_0%'R/soc/pinctrl@75C0000/ssc_qupv3_se6_1%'b/soc/pinctrl@75C0000/ssc_qupv3_se6_2%'r/soc/pinctrl@75C0000/ssc_qupv3_se6_3%'/soc/pinctrl@75C0000/ssc_qupv3_se7_0%'/soc/pinctrl@75C0000/ssc_qupv3_se7_1%'/soc/pinctrl@75C0000/ssc_qupv3_se7_2%'/soc/pinctrl@75C0000/ssc_qupv3_se7_3%'/soc/pinctrl@75C0000/ssc_qupv3_se8_0%'/soc/pinctrl@75C0000/ssc_qupv3_se8_1.'/soc/pinctrl@75C0000/ssc_qupv3_se9_0_reserved.'/soc/pinctrl@75C0000/ssc_qupv3_se9_1_reserved-(/soc/pinctrl@75C0000/qup_ssc0_se0_i2c_active,(,/soc/pinctrl@75C0000/qup_ssc0_se0_i2c_sleep-(C/soc/pinctrl@75C0000/qup_ssc0_se0_i3c_active,([/soc/pinctrl@75C0000/qup_ssc0_se0_i3c_sleep1(r/soc/pinctrl@75C0000/qup_ssc0_se0_i3c_ibi_active0(/soc/pinctrl@75C0000/qup_ssc0_se0_i3c_ibi_sleep-(/soc/pinctrl@75C0000/qup_ssc0_se1_i2c_active,(/soc/pinctrl@75C0000/qup_ssc0_se1_i2c_sleep-(/soc/pinctrl@75C0000/qup_ssc0_se1_i3c_active,(/soc/pinctrl@75C0000/qup_ssc0_se1_i3c_sleep1)/soc/pinctrl@75C0000/qup_ssc0_se1_i3c_ibi_active0)#/soc/pinctrl@75C0000/qup_ssc0_se1_i3c_ibi_sleep-)>/soc/pinctrl@75C0000/qup_ssc0_se2_i2c_active,)V/soc/pinctrl@75C0000/qup_ssc0_se2_i2c_sleep-)m/soc/pinctrl@75C0000/qup_ssc0_se2_i3c_active,)/soc/pinctrl@75C0000/qup_ssc0_se2_i3c_sleep1)/soc/pinctrl@75C0000/qup_ssc0_se2_i3c_ibi_active0)/soc/pinctrl@75C0000/qup_ssc0_se2_i3c_ibi_sleep-)/soc/pinctrl@75C0000/qup_ssc0_se2_spi_active,)/soc/pinctrl@75C0000/qup_ssc0_se2_spi_sleep.*/soc/pinctrl@75C0000/qup_ssc0_se2_uart_active-*/soc/pinctrl@75C0000/qup_ssc0_se2_uart_sleep-*3/soc/pinctrl@75C0000/qup_ssc0_se3_i2c_active,*K/soc/pinctrl@75C0000/qup_ssc0_se3_i2c_sleep-*b/soc/pinctrl@75C0000/qup_ssc0_se3_i3c_active,*z/soc/pinctrl@75C0000/qup_ssc0_se3_i3c_sleep1*/soc/pinctrl@75C0000/qup_ssc0_se3_i3c_ibi_active0*/soc/pinctrl@75C0000/qup_ssc0_se3_i3c_ibi_sleep-*/soc/pinctrl@75C0000/qup_ssc0_se4_i2c_active,*/soc/pinctrl@75C0000/qup_ssc0_se4_i2c_sleep-*/soc/pinctrl@75C0000/qup_ssc0_se4_spi_active,+/soc/pinctrl@75C0000/qup_ssc0_se4_spi_sleep.+&/soc/pinctrl@75C0000/qup_ssc0_se4_uart_active-+?/soc/pinctrl@75C0000/qup_ssc0_se4_uart_sleep-+W/soc/pinctrl@75C0000/qup_ssc0_se5_i2c_active,+o/soc/pinctrl@75C0000/qup_ssc0_se5_i2c_sleep-+/soc/pinctrl@75C0000/qup_ssc0_se5_i3c_active,+/soc/pinctrl@75C0000/qup_ssc0_se5_i3c_sleep1+/soc/pinctrl@75C0000/qup_ssc0_se5_i3c_ibi_active0+/soc/pinctrl@75C0000/qup_ssc0_se5_i3c_ibi_sleep-+/soc/pinctrl@75C0000/qup_ssc0_se5_spi_active,,/soc/pinctrl@75C0000/qup_ssc0_se5_spi_sleep.,/soc/pinctrl@75C0000/qup_ssc0_se5_uart_active-,4/soc/pinctrl@75C0000/qup_ssc0_se5_uart_sleep-,L/soc/pinctrl@75C0000/qup_ssc0_se6_i2c_active,,d/soc/pinctrl@75C0000/qup_ssc0_se6_i2c_sleep-,{/soc/pinctrl@75C0000/qup_ssc0_se6_i3c_active,,/soc/pinctrl@75C0000/qup_ssc0_se6_i3c_sleep1,/soc/pinctrl@75C0000/qup_ssc0_se6_i3c_ibi_active0,/soc/pinctrl@75C0000/qup_ssc0_se6_i3c_ibi_sleep-,/soc/pinctrl@75C0000/qup_ssc0_se6_spi_active,,/soc/pinctrl@75C0000/qup_ssc0_se6_spi_sleep.-/soc/pinctrl@75C0000/qup_ssc0_se6_uart_active--)/soc/pinctrl@75C0000/qup_ssc0_se6_uart_sleep--A/soc/pinctrl@75C0000/qup_ssc0_se7_i2c_active,-Y/soc/pinctrl@75C0000/qup_ssc0_se7_i2c_sleep--p/soc/pinctrl@75C0000/qup_ssc0_se7_spi_active,-/soc/pinctrl@75C0000/qup_ssc0_se7_spi_sleep.-/soc/pinctrl@75C0000/qup_ssc0_se7_uart_active--/soc/pinctrl@75C0000/qup_ssc0_se7_uart_sleep--/soc/pinctrl@75C0000/qup_ssc0_se8_i2c_active,-/soc/pinctrl@75C0000/qup_ssc0_se8_i2c_sleep--/soc/pinctrl@75C0000/qup_ssc0_se8_i3c_active,./soc/pinctrl@75C0000/qup_ssc0_se8_i3c_sleep1../soc/pinctrl@75C0000/qup_ssc0_se8_i3c_ibi_active0.J/soc/pinctrl@75C0000/qup_ssc0_se8_i3c_ibi_sleep..e/soc/pinctrl@75C0000/qup_ssc0_se10_i2c_active-.~/soc/pinctrl@75C0000/qup_ssc0_se10_i2c_sleep../soc/pinctrl@75C0000/qup_ssc0_se10_spi_active-./soc/pinctrl@75C0000/qup_ssc0_se10_spi_sleep/./soc/pinctrl@75C0000/qup_ssc0_se10_uart_active../soc/pinctrl@75C0000/qup_ssc0_se10_uart_sleep ./soc/vdd_mxa //soc/vdd_mxc / /soc/vdd_cx//soc/vdd_lpi_mx//soc/vdd_lpi_cx/'/soc/clock-controller@100000/+/soc/clock-controller@1f40000/8/soc/clock-controller@7700000/H/soc/clock-controller@6bc0000/W/soc/clock-controller@7b00000/e/soc/clock-controller@6e40000/t/soc/clock-controller@7a00000/x/soc/cesta@7213000//soc/funnel@10041000//soc/funnel@11c44000//soc/funnel@11c50000//soc/funnel@11c04000/soc/tnoc@11c31000//soc/tnoc@11c39000M/soc/tpda@11c47000d/soc/tpda@11c53000/soc/tpda@11c550000/soc/systemcache@204000000/soc/spmi-bus@c4000000(/soc/spmi-bus@c400000/pmic@0602/soc/spmi-bus@c400000/pmic@0/spmi-vadc@92/therm_table0>/soc/spmi-bus@c4360000H/soc/spmi-bus@c4470000R/soc/ibi_ssc_0_cfg@75000000`/soc/ibi_ssc_1_cfg@75100000n/soc/ibi_ssc_2_cfg@75200000|/soc/ibi_ssc_3_cfg@75300000/soc/ibi_ssc_4_cfg@75400000/soc/ibi_ssc_5_cfg@75500000/soc/ibi_ssc_6_cfg@756000090/soc/kernel_test_devices@0/interrupt-controller@101400000/sw modelcompatible#address-cells#size-cellsproc-namechip-infophandleregclientprotocol-nameprotocol-idxinterrupt-parentinterrupts#signalsclient-mappingoffsetout-masktimer-nametimer-freqtimer-numtimer-interruptngpioswidthidqcom,strongpullegpiogpio-controller#gpio-cellsinterrupt-typesinterrupt-namessummary-targetprocglobal-ctxt-namemuxconfigqcom,slewrateqcom,sleep-configregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-init-microvoltqcom,resource-nameqcom,all-pd-regulatorqcom,lpr-enableqcom,drv-idreg-names#clock-cellssupported-hostshostremote-hostfifo-sizemtu-sizeirq-outqos-max-ratechannel-namemailbox-area-size-bytesmaster-mailbox-size-bytesmax-tx-pending-itemsis-mastermailbox-desc-starthost-nametransportremote-ssch-nameoptionsprioritystack-sizeintentshost-idfflagsmax-entriesdestirqcore-top-csr-strtcsr-basemutex-offsets-datawonce-offsetsbase_portnum_portsatidsync_periodtpdm_nametpdatpda_portdatasetcmb_sizecti_channelscti_triggersdbg_regspwrdbg_ctrl_reglpi_funnellpi_funnel_portport_lpass_lpi_dl_tpdaport_lpass_lpi_crm_dl_tpdaport_lpass_lpi_audio_hm_dl_tpdaport_ddrss_lpi_slice0ddrss_lpi_trace_nocport_lpi_etmport_lpi_stmport_stmport_sdc_etmport_sdc_itmport_lpass_lpi_nocport_lpi_aon_nocport_aocport_enpu0_nocport_enpu1_noccti_nametnoc_idtnoc_funnel_nametpda_nameport_occupied_masktpda_funnel_namellcc-common-regllcc-lcp-regchannel-mode-checklpi-basenum-lpi-channelsscidvalueuse-interruptsidmidpmicbidtherm-tbllabelhw-chhw-settleavg-spdec-ratiocal-methodscalingscale-fcnpull-upasidarr_idtablehw-common-paramsadctm-hw-paramstrip-rangenum_ssc_qupibi_baseprotocolse_island_configtre_list_sizeibi_se_indexse_modeload_fwdfs_modeibi_idgpiigpii_irqmgr_irqstatusclock-namesclocksqup_idqup_common_offsetse_wrapper_base_offsetcore_frequencyqup_flagsnum_sesdc_gpii_listcore_offsetibi_instancese_flagsFIFO_MODEprotocol_supportedinterface_supportednum_gpiisring_size_multipliercore_irqpdc_irqparent_wakeup_gpioshared_seod_frequencyi2c_hs_i3c_src_freqis_pipeline_enablepinctrl-namespinctrl-0pinctrl-1pinctrl-2pinctrl-3pinctrl-4pinctrl-5pinctrl-6pinctrl-7pinctrl-8pinctrl-9num_top_qupsirq_numqup0_cfgqup1_cfgqup2_cfgqup3_cfggsi_patcsr_addrtcsr_gpii_offsettcsr_irqgpii_interruptsnum_gpiiactivetypeuStructVerpszInstNameuaMasterEApszHwioBaseuHwioBaseOffsetuHwioBasehBamDevuIntIduBamIntIduMyEEsmbus_clksmbus_datauGpioIntNumuaNumEndPointsuaVoltageVotebIsLpiTlmmLAuaEAuDataLineMasknum_device_propstlmm_name_strsvs_npa_stris_masterdefault_clock_gearprog_bam_trustisland_votesubsystem_sleep_votetlmm_offsettlmm_valsvs_npause_gpio_intlog_levelno_retentionnum_local_portslocal_port_baselocal_channel_baseshared_channel_basenum_local_countersis_lpm_used_for_mgr_bam_translpm_mgr_sb_region_baselpm_mgr_sb_region_sizeis_lpm_sat_sb_region_dump_enablelpm_sat_sb_region_baselpm_sat_sb_region_sizeee_assignrevMmpmCoreIdTypeMmpmCoreInstanceIdTypepClientNamepwrCtrlFlagcallBackFlagMMPM_CallbackcbFcnStackSizeinterrupt-controller#interrupt-cellsmessageservice_idinstance_idqdss_service_idimage_idxeic_crash_enableeic_crash_typeeic_crash_delaypd_timeout_exit_msecthreshold_timeout_secnum_pdrs_logpd_binary_local_pathpd_binary_remote_pathpd_namepd_mon_install_attrpd_mon_image_sw_idsubdomain_namepd_mon_restart_enablepd_mon_dump_disablercinit_term_err_fatal_enablercinit_term_timeoutrcinit_term_timeout_group_0rcinit_term_timeout_group_1rcinit_term_timeout_group_2rcinit_term_timeout_group_3rcinit_term_timeout_group_4rcinit_term_timeout_group_5rcinit_term_timeout_group_6rcinit_term_timeout_group_7rcinit_term_latency_enableimage_idpram_namept_namewdog_irq_numerr_irq_numcode_ram_addrdata_ram_addrcode_ram_sizedata_ram_sizepram_addrssc_sdc_physpool_addrssc_sdc_physpool_sizeipcmem_physpool_addripcmem_physpool_sizefree-gpiosinterconnectsinterconnect-namesinterconnect-modesinterconnect-0interconnect-1interconnect-2llccsscid-mapping-regclientsdump-poolsdiag_cmd_request_fdiag_start_stress_test_fdiag_stress_test_loopbackdiag_legacy_health_count_basediag_get_max_req_pkt_lendiag_delay_health_count_basediag_dcm_cmd_reg_test_basediag_ulogdiag_processor_iddiag_subsys_id_basediag_flow_control_count_basediag_dsm_chained_count_basediag_get_cmd_reg_tbldiag_subsys_mask_retrieval_basediag_f3_trace_set_configdiag_tx_mode_configdiag_stress_test_delayed_rspdiag_drop_threshold_configdiag_query_enablediag_get_time_apidiag_get_drop_perdiag_uimage_health_statsdiag_start_stress_test_adv_fdiag_health_stats_basediag_get_set_drain_paramdiag_set_drain_propdiag_health_report_configdiag_get_set_client_settingsdiag_lock_buffer_apidiag_instance_id_basediag_err_ulog_sizediag_debug_ulog_sizediag_cmd_ulog_sizediag_data_ulog_sizediag_qdss_ulog_sizediag_ctrl_ulog_sizediag_listener_ulog_sizediag_sendbuf_dbg_ulog_sizediag_dsqb_ulog_sizediag_mpd_drain_timer_lendiag_mpd_buf_commit_thresh_perdiag_mpd_buf_drain_thresh_perdiag_event_timer_lendiag_event_rpt_pkt_len_sizediag_event_rpt_pkt_sizediag_drain_timer_lendiag_event_send_maxdiag_event_heap_sizediag_ctrl_send_buf_sizediag_ctrl_read_buf_sizediag_cmd_read_buf_sizediag_event_sec_heap_sizediag_dci_read_buf_sizediag_rsp_heap_sizediag_heap_sizediag_f3_trace_buf_sizediag_buf_sizediag_rsp_alloc_retry_timer_lendiag_mask_notify_timer_lendiag_tx_sleep_threshold_defaultdiag_tx_sleep_time_defaultdiag_core_pd_drain_thresholddiag_sio_timeout_timer_lendiag_cmd_read_tout_timer_lendiag_max_active_listenersdiag_many_drain_per_markdiag_few_drain_per_markdiag_hdlc_pad_lendiag_stress_task_sleep_completediag_buf_commit_thresholddiag_buffer_default_lock_statediag_drop_flow_cnt_incrdiag_drop_per_step_maxdiag_drop_per_threshold_maxdiag_deferrable_timerdiag_deferrable_timer_exdiag_send_data_buf_size_maxdiag_min_send_data_sizediag_msg_fmt_str_arg_sizediag_event_rpt_pkt_len_size_nrtdiag_event_rpt_pkt_size_nrtdiag_event_send_max_nrtdiag_event_timer_len_nrtdiag_tx_sleep_threshold_nrtdiag_tx_sleep_time_nrtdiag_drain_timer_len_nrtdiagbuf_commit_threshold_nrtdiag_mpd_commit_thresh_nrt_perdiag_uimage_drain_timer_lendiag_uimage_buf_high_per_wmdiag_uimage_f3_trace_buf_sizediag_uimage_pooldiag_uimage_test_pooldiag_early_log_controldiag_early_log_maskdiag_early_event_maskdiag_early_message_maskdiag_f3_trace_controldiag_f3_trace_detail_maskdiag_f3_trace_versionTHREAD_NUMBEROVERHANG_VOTE_TIMEOUT_MSDEBUG_LEVELbaseAddrphysAddrcoreIdpwrDomaincoreClockInstancesmasterBusPortInstancesslaveBusPortInstancesnumInstancesmemIdclkIdclkTypeclkCntlTypeclkNameclkSrcIdmemoryIdportConnectionbusClkregProgClocksicbarbMasteraccessPorticbarbSlavemasterPortslavePortpwrDomainNamepwrDomainTypeintrReinitTriggerintrReinitDonesecurityClocksclientNumrouteshw_instancemasterIcbPortslaveIcbPortminindex0index1index2index3index4index5index6index7index8index9index10socipcc_mprocipcc_compute_l0ipcc_compute_l1ipcc_periphipcc_legacySystemTimerWakeUpTimertlmmqup0_se0_l0qup0_se0_l1qup0_se0_l2qup0_se0_l3qup0_se1_l0qup0_se1_l1qup0_se1_l2qup0_se1_l3qup0_se2_l0qup0_se2_l1qup0_se2_l2qup0_se2_l3qup0_se2_l4qup0_se2_l5qup0_se2_l6qup0_se3_l0qup0_se3_l1qup0_se3_l2qup0_se3_l3qup0_se3_l4qup0_se3_l5qup0_se3_l6qup0_se4_l0qup0_se4_l1qup0_se4_l2qup0_se4_l3qup0_se5_l0qup0_se5_l1qup0_se5_l2qup0_se5_l3qup0_se6_l0qup0_se6_l1qup0_se6_l2qup0_se6_l3qup0_se7_l0qup0_se7_l1qup0_se7_l2qup0_se7_l3qup1_se0_l0qup1_se0_l1qup1_se0_l2qup1_se0_l3qup1_se1_l0qup1_se1_l1qup1_se1_l2qup1_se1_l3qup1_se2_l0qup1_se2_l1qup1_se2_l2qup1_se2_l3qup1_se2_l4qup1_se2_l5qup1_se2_l6qup1_se3_l0qup1_se3_l1qup1_se3_l2qup1_se3_l3qup1_se3_l4qup1_se3_l5qup1_se3_l6qup1_se4_l0qup1_se4_l1qup1_se4_l2qup1_se4_l3qup1_se5_l0qup1_se5_l1qup1_se5_l2qup1_se5_l3qup1_se6_l0qup1_se6_l1qup1_se6_l2qup1_se6_l3qup1_se7_l0qup1_se7_l1qup1_se7_l2qup1_se7_l3qup2_se0_l0qup2_se0_l1qup2_se0_l2qup2_se0_l3qup2_se1_l0qup2_se1_l1qup2_se1_l2qup2_se1_l3qup2_se2_l0qup2_se2_l1qup2_se2_l2qup2_se2_l3qup2_se2_l4qup2_se2_l5qup2_se2_l6qup2_se3_l0qup2_se3_l1qup2_se3_l2qup2_se3_l3qup2_se3_l4qup2_se3_l5qup2_se3_l6qup2_se4_l0qup2_se4_l1qup2_se4_l2qup2_se4_l3qup2_se5_l0qup2_se5_l1qup2_se5_l2qup2_se5_l3qup2_se6_l0qup2_se6_l1qup2_se6_l2qup2_se6_l3qup2_se7_l0qup2_se7_l1qup2_se7_l2qup2_se7_l3qup3_se0_l0qup3_se0_l1qup3_se0_l2qup3_se0_l3qup3_se0_l4qup3_se0_l5qup3_se0_l6qup3_se0_l7qup3_se1_l0qup3_se1_l1qup3_se1_l2qup3_se1_l3qup3_se1_l4qup3_se1_l5qup3_se1_l6qup3_se1_l7GPIO_config_activeGPIO_config_idleGPIO_config_sleepGPIO_config_wakelpi_tlmmslimbus_clkslimbus_dataslimbus_default_gpio_cfgssc_tlmmssc_gpio_10_clkssc_gpio_11_clkssc_gpio_12_clkssc_gpio_13_clkssc_gpio_18_clkssc_gpio_19_clkssc_gpio_24_clkssc_gpio_25_clkssc_gpio_26_clk_reservedssc_gpio_27_clk_reservedssc_gpio_28_clk_reservedssc_gpio_29_clk_reservedssc_gpio_30_clk_reservedssc_gpio_31_clk_reservedssc_gpio_34_clk_reservedssc_gpio_35_clk_reservedssc_gpio_6_clkssc_gpio_7_clkssc_qupv3_se0_0ssc_qupv3_se0_1ssc_qupv3_se10_0ssc_qupv3_se10_1ssc_qupv3_se10_2ssc_qupv3_se10_3ssc_qupv3_se11_0_reservedssc_qupv3_se11_1_reservedssc_qupv3_se11_2_reservedssc_qupv3_se11_3_reservedssc_qupv3_se12_0_reservedssc_qupv3_se12_1_reservedssc_qupv3_se13_0_reservedssc_qupv3_se13_1_reservedssc_qupv3_se13_2_reservedssc_qupv3_se13_3_reservedssc_qupv3_se14_0_reservedssc_qupv3_se14_1_reservedssc_qupv3_se1_0ssc_qupv3_se1_1ssc_qupv3_se1_2_reservedssc_qupv3_se1_3_reservedssc_qupv3_se2_0ssc_qupv3_se2_1ssc_qupv3_se2_2ssc_qupv3_se2_3ssc_qupv3_se2_4ssc_qupv3_se2_5ssc_qupv3_se3_0ssc_qupv3_se3_1ssc_qupv3_se4_0ssc_qupv3_se4_1ssc_qupv3_se4_2ssc_qupv3_se4_3ssc_qupv3_se4_4ssc_qupv3_se4_5ssc_qupv3_se5_0ssc_qupv3_se5_1ssc_qupv3_se5_2ssc_qupv3_se5_3ssc_qupv3_se6_0ssc_qupv3_se6_1ssc_qupv3_se6_2ssc_qupv3_se6_3ssc_qupv3_se7_0ssc_qupv3_se7_1ssc_qupv3_se7_2ssc_qupv3_se7_3ssc_qupv3_se8_0ssc_qupv3_se8_1ssc_qupv3_se9_0_reservedssc_qupv3_se9_1_reservedqup_ssc0_se0_i2c_activequp_ssc0_se0_i2c_sleepqup_ssc0_se0_i3c_activequp_ssc0_se0_i3c_sleepqup_ssc0_se0_i3c_ibi_activequp_ssc0_se0_i3c_ibi_sleepqup_ssc0_se1_i2c_activequp_ssc0_se1_i2c_sleepqup_ssc0_se1_i3c_activequp_ssc0_se1_i3c_sleepqup_ssc0_se1_i3c_ibi_activequp_ssc0_se1_i3c_ibi_sleepqup_ssc0_se2_i2c_activequp_ssc0_se2_i2c_sleepqup_ssc0_se2_i3c_activequp_ssc0_se2_i3c_sleepqup_ssc0_se2_i3c_ibi_activequp_ssc0_se2_i3c_ibi_sleepqup_ssc0_se2_spi_activequp_ssc0_se2_spi_sleepqup_ssc0_se2_uart_activequp_ssc0_se2_uart_sleepqup_ssc0_se3_i2c_activequp_ssc0_se3_i2c_sleepqup_ssc0_se3_i3c_activequp_ssc0_se3_i3c_sleepqup_ssc0_se3_i3c_ibi_activequp_ssc0_se3_i3c_ibi_sleepqup_ssc0_se4_i2c_activequp_ssc0_se4_i2c_sleepqup_ssc0_se4_spi_activequp_ssc0_se4_spi_sleepqup_ssc0_se4_uart_activequp_ssc0_se4_uart_sleepqup_ssc0_se5_i2c_activequp_ssc0_se5_i2c_sleepqup_ssc0_se5_i3c_activequp_ssc0_se5_i3c_sleepqup_ssc0_se5_i3c_ibi_activequp_ssc0_se5_i3c_ibi_sleepqup_ssc0_se5_spi_activequp_ssc0_se5_spi_sleepqup_ssc0_se5_uart_activequp_ssc0_se5_uart_sleepqup_ssc0_se6_i2c_activequp_ssc0_se6_i2c_sleepqup_ssc0_se6_i3c_activequp_ssc0_se6_i3c_sleepqup_ssc0_se6_i3c_ibi_activequp_ssc0_se6_i3c_ibi_sleepqup_ssc0_se6_spi_activequp_ssc0_se6_spi_sleepqup_ssc0_se6_uart_activequp_ssc0_se6_uart_sleepqup_ssc0_se7_i2c_activequp_ssc0_se7_i2c_sleepqup_ssc0_se7_spi_activequp_ssc0_se7_spi_sleepqup_ssc0_se7_uart_activequp_ssc0_se7_uart_sleepqup_ssc0_se8_i2c_activequp_ssc0_se8_i2c_sleepqup_ssc0_se8_i3c_activequp_ssc0_se8_i3c_sleepqup_ssc0_se8_i3c_ibi_activequp_ssc0_se8_i3c_ibi_sleepqup_ssc0_se10_i2c_activequp_ssc0_se10_i2c_sleepqup_ssc0_se10_spi_activequp_ssc0_se10_spi_sleepqup_ssc0_se10_uart_activequp_ssc0_se10_uart_sleepvdd_mxavdd_mxcvdd_cxvdd_lpi_mxvdd_lpi_cxgcclpass_aon_cclpass_aon_mx_cclpass_audio_cclpass_core_cclpass_lpmla_ccscclpass_cestain_fun0_in_fun0_cxatbfunnellpass_lpi_fun0_fun0_cxatbfunnellpass_lpi_fun1_fun1_cxatbfunnelaoss_apb_fun0ddrss_lpi_slice1ddrss_lpi_trace_nocsystemcache0spmi_buspmk8850_0therm_tablespmi_bus1spmi_bus2ibi_ssc_0_cfgibi_ssc_1_cfgibi_ssc_2_cfgibi_ssc_3_cfgibi_ssc_4_cfgibi_ssc_5_cfgibi_ssc_6_cfgintcsw X8 x( @ qcom,glymur qcom,glymur board-id,audio_process-glymur-1.0-adsp6soc @cxstmtrace@16000000qcom,stmtraceHLV@lpistmtrace@7100000qcom,stmtraceHLV@sw@corecpt_boot_test ``lwtest1 lw*My Secret Message, Please keep it secret!test2test_typesU 󵳥U#44VxeC!%(<穣4VxܺvT2Mtest_pic_3 qcom,picd test_uart1 qcom,uartd  lbaserxtxtest_uart2 qcom,uartd PD_Access_controlvUOEM_Flavor_Validationmprocqmiqcsiqcom,qmi_qcsi_user_pd_configqmi_qcsi_ping_server_config!debugtraceqcom,debugtrace debugtoolstms_diagqcom,tms_diageic qcom,eicZversion_tblqcom,image_version_tbl_idxpowerqdsp_pmpdqcom,pd-audio-processdiagqcom,audio_user_diagcfgdiagcfg_cmdg i3=Ql diagcfg_param   :Nc21G`z AUDIO_ISLAND_TCM_PHYSPOOLQSH_ISLAND_POOL__symbols__/soc/sw modelcompatible#address-cells#size-cellsproc-namechip-infophandleregbase_portnum_portstest_configtest_bool1test_bool2test_vertest_uint8_listtest_uint16test_uint32test_uint32_listtest_uint64test_stringtest_uint8test_uint8_list_emptytest_uint16_listtest_uint16_list_emptytest_uint32_list_emptytest_uint64_listtest_uint64_list_emptyreg_altreg-namesPD_indicatortest_oem_entryservice_idinstance_idqdss_service_idimage_ideic_crash_enableeic_crash_typeeic_crash_delayimage_idxQDI_QDSP_PM_USER_IDdiag_test_cmd_fdiag_v2_test_cmd_fdiag_legacy_health_count_basediag_ulogdiag_processor_iddiag_subsys_id_basediag_lsm_cmd_reg_test_basediag_get_set_drain_paramdiag_f3_trace_set_configdiag_health_stats_basediag_err_ulog_sizediag_debug_ulog_sizediag_qdss_ulog_sizediag_logtracker_ulog_sizediag_dsqb_ulog_sizediag_event_timer_lendiag_event_rpt_pkt_len_sizediag_event_rpt_pkt_sizediag_event_send_maxdiag_multipd_buf_sizediag_multipd_event_heap_sizediag_send_buf_size_data_userpddiag_lsm_stack_sizediag_stress_task_sleep_completediag_deferrable_timerdiag_deferrable_timer_exdiag_msg_fmt_str_arg_sizediag_uimage_mpd_buf_sizediag_uimage_f3_trace_buf_sizediag_uimage_pooldiag_uimage_test_poolsocsw h8( qcom,glymur qcom,glymur board-id,qsh_process-glymur-1.0-adsp6soc @cxstmtrace@16000000qcom,stmtraceHL@V@lpistmtrace@7100000qcom,stmtraceHL@V@sw@corecpt_boot_testPD_Access_control`XOEM_Flavor_Validationmmprocqmiqcsiqcom,qmi_qcsi_user_pd_configqmi_qcsi_ping_server_config|"debugtraceqcom,debugtrace debugtoolstms_diagqcom,tms_diageic qcom,eicZversion_tblqcom,image_version_tbl_idxpowerqdsp_pmpdqcom,pd-qsh-processproductssdcloaderqcom,sdcloadersdc_params<!/=Kasdc_physpoolUk'Pdiagqcom,sensor_user_diagcfgdiagcfg_cmdhj=6O h'diagcfg_param 22F\y. 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clock13lpass_audio_cc_codec_mem3_clk clock14lpass_aon_mx_cc_va_mem0_clk clock15lpass_aon_mx_cc_va_mem1_clk clock16$lpass_core_cc_sysnoc_mport_core_clk clock17lpass_audio_cc_bus_timeout_clk clock18C(lpass_aon_cc_lpass_0_lpmla_ahb_odsc_clk clock19D(lpass_aon_cc_lpass_1_lpmla_ahb_odsc_clk clock20#lpass_core_cc_sysnoc_sway_core_clk clock21?scc_ccd_ahb2ahb_m_clk clock22@scc_ccd_ahb2ahb_s_clk clock23Ascc_ahb2ahb_s_clk clock24Blpass_aon_mx_cc_ibi_clk clock25Slpass_core_cc_resampler_clk clock26Xlpass_audio_cc_slimbus_clk clock27Zlpass_core_cc_avsync_stc_clk clock28[lpass_core_cc_avsync_atime_clk clock29]lpass_core_cc_hw_af_clk clock30^lpass_core_cc_hw_af_noc_clk clock31n!lpass_lpmla_cc_lpass_0_lpmla_clk clock32o!lpass_lpmla_cc_lpass_1_lpmla_clk clock33t lpass_aon_cc_enpu_scheduler_clk clock34jlpass_aon_cc_sdc_proc_fclk_clk clock35m scc_ccd_clk clock36l scc_smem_clk busport-arraybusPort0 ,3ANbusPort1 @,3ANbusPort2 @@,3ANbusPort3 A@,3ANbusPort4 B@,3ANbusPort5 C@,3ANbusPort6 D@,3ANbusPort7 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5&O%0j__symbols__P/socT/soc/ipcc/ipcc@3e02000_/soc/ipcc/ipcc@3e40000o/soc/ipcc/ipcc@3e80000/soc/ipcc/ipcc@3ec0000/soc/ipcc_legacy@6888004/soc/timetick/timer@68a2000/soc/timetick/timer@68a3000/soc/pinctrl@f100000!/soc/pinctrl@f100000/qup0_se0_l0!/soc/pinctrl@f100000/qup0_se0_l1!/soc/pinctrl@f100000/qup0_se0_l2!/soc/pinctrl@f100000/qup0_se0_l3!/soc/pinctrl@f100000/qup0_se1_l0!/soc/pinctrl@f100000/qup0_se1_l1!/soc/pinctrl@f100000/qup0_se1_l2!/soc/pinctrl@f100000/qup0_se1_l3!/soc/pinctrl@f100000/qup0_se2_l0! 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/soc/pinctrl@f100000/qup1_se2_l4!/soc/pinctrl@f100000/qup1_se2_l5!$/soc/pinctrl@f100000/qup1_se2_l6!0/soc/pinctrl@f100000/qup1_se3_l0!^P*GQ0 ߔӟerZ4s0qɕv?1|Cr-o0m0U#0wDM2@tXϙL0 U00 U0U% 0 +0U = j`0 *H=g0d0CdPX3)MF%%,XkP$;K05bض3ECg6m7s!sƌ&aK00u0 *H=01 0 UUS1+0)U"SECTOOLS SECP384R1 CURVE TEST ROOT10U San Diego10U QUALCOMM10U CDMA Technologies100.U 'General Use Test Key (for testing only)0 160321215215Z 360316215215Z01 0 UUS1,0*U#SECTOOLS SECP384R1 CURVE TEST ROOT010U San Diego10U QUALCOMM10U CDMA Technologies1200U )General Use Test Key 0 (for testing only)0v0*H=+"bT}I%O[Hp] f{I/C#9g@qKx?jEyAsԜh'$,H peypyP5`0^0U#0oq' s ֟>qb0UwDM2@tXϙL0U00 U0 *H=i0f1‚_H9<} ͣb:v࣮^6+<[61ftWzcvž$ֱ(9 @n)f>F߲400N0 *H=01 0 UUS1+0)U"SECTOOLS SECP384R1 CURVE TEST ROOT10U San Diego10U QUALCOMM10U CDMA Technologies100.U 'General Use Test Key (for testing only)0 160321215211Z 360316215211Z01 0 UUS1+0)U"SECTOOLS SECP384R1 CURVE TEST ROOT10U San Diego10U QUALCOMM10U CDMA Technologies100.U 'General Use Test Key (for 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